forked from dolphin-emu/dolphin
PPCAnalyst/JIT: add ability to easily toggle branch and carry merging
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@@ -467,9 +467,13 @@ void PPCAnalyzer::ReorderInstructions(u32 instructions, CodeOp *code)
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{
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// For carry, bubble instructions *towards* each other; one direction often isn't enough
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// to get pairs like addc/adde next to each other.
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ReorderInstructionsCore(instructions, code, true, REORDER_CARRY);
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ReorderInstructionsCore(instructions, code, false, REORDER_CARRY);
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ReorderInstructionsCore(instructions, code, false, REORDER_CMP);
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if (HasOption(OPTION_CARRY_MERGE))
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{
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ReorderInstructionsCore(instructions, code, true, REORDER_CARRY);
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ReorderInstructionsCore(instructions, code, false, REORDER_CARRY);
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}
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if (HasOption(OPTION_BRANCH_MERGE))
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ReorderInstructionsCore(instructions, code, false, REORDER_CMP);
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}
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void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInfo *opinfo, u32 index)
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@@ -509,7 +513,10 @@ void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInf
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// We're going to try to avoid storing carry in XER if we can avoid it -- keep it in the x86 carry flag!
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// If the instruction reads CA but doesn't write it, we still need to store CA in XER; we can't
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// leave it in flags.
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code->wantsCAInFlags = code->wantsCA && code->outputCA && opinfo->type == OPTYPE_INTEGER;
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if (HasOption(OPTION_CARRY_MERGE))
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code->wantsCAInFlags = code->wantsCA && code->outputCA && opinfo->type == OPTYPE_INTEGER;
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else
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code->wantsCAInFlags = false;
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// mfspr/mtspr can affect/use XER, so be super careful here
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// we need to note specifically that mfspr needs CA in XER, not in the x86 carry flag
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