forked from dolphin-emu/dolphin
Address delroth's comments.
This commit is contained in:
@@ -311,7 +311,7 @@ u32 Flatten(u32 address, int *realsize, BlockStats *st, BlockRegStats *gpa,
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CodeOp *code = buffer->codebuffer;
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bool foundExit = false;
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u32 returnAddress = 0;
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u32 return_address = 0;
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// Do analysis of the code, look for dependencies etc
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int numSystemInstructions = 0;
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@@ -446,15 +446,15 @@ u32 Flatten(u32 address, int *realsize, BlockStats *st, BlockRegStats *gpa,
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}
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else if (inst.OPCD == 19 && inst.SUBOP10 == 16 &&
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(inst.BO & (1 << 4)) && (inst.BO & (1 << 2)) &&
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returnAddress != 0)
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return_address != 0)
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{
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// bclrx with unconditional branch = return
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follow = true;
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destination = returnAddress;
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returnAddress = 0;
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destination = return_address;
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return_address = 0;
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if (inst.LK)
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returnAddress = address + 4;
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return_address = address + 4;
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}
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else if (inst.OPCD == 31 && inst.SUBOP10 == 467)
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{
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@@ -463,7 +463,7 @@ u32 Flatten(u32 address, int *realsize, BlockStats *st, BlockRegStats *gpa,
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if (index == SPR_LR) {
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// We give up to follow the return address
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// because we have to check the register usage.
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returnAddress = 0;
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return_address = 0;
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}
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}
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@@ -699,7 +699,7 @@ void FindFunctions(u32 startAddr, u32 endAddr, PPCSymbolDB *func_db)
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leafSize, niceSize, unniceSize);
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}
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void PPCAnalyser::ReorderInstructions(u32 instructions, CodeOp *code)
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void PPCAnalyzer::ReorderInstructions(u32 instructions, CodeOp *code)
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{
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// Instruction Reordering Pass
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// Bubble down compares towards branches, so that they can be merged.
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@@ -723,7 +723,7 @@ void PPCAnalyser::ReorderInstructions(u32 instructions, CodeOp *code)
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}
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}
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void PPCAnalyser::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInfo *opinfo, u32 index)
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void PPCAnalyzer::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInfo *opinfo, u32 index)
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{
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code->wantsCR0 = false;
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code->wantsCR1 = false;
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@@ -822,7 +822,7 @@ void PPCAnalyser::SetInstructionStats(CodeBlock *block, CodeOp *code, GekkoOPInf
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}
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}
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u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32 blockSize)
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u32 PPCAnalyzer::Analyze(u32 address, CodeBlock *block, CodeBuffer *buffer, u32 blockSize)
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{
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// Clear block stats
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memset(block->m_stats, 0, sizeof(BlockStats));
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@@ -839,12 +839,12 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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// Reset our block state
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block->m_broken = false;
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block->m_instructions = 0;
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block->m_num_instructions = 0;
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CodeOp *code = buffer->codebuffer;
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bool found_exit = false;
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u32 returnAddress = 0;
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u32 return_address = 0;
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u32 numFollows = 0;
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u32 num_inst = 0;
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@@ -888,15 +888,15 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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}
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else if (inst.OPCD == 19 && inst.SUBOP10 == 16 &&
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(inst.BO & (1 << 4)) && (inst.BO & (1 << 2)) &&
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returnAddress != 0)
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return_address != 0)
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{
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// bclrx with unconditional branch = return
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follow = true;
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destination = returnAddress;
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returnAddress = 0;
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destination = return_address;
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return_address = 0;
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if (inst.LK)
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returnAddress = address + 4;
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return_address = address + 4;
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}
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else if (inst.OPCD == 31 && inst.SUBOP10 == 467)
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{
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@@ -905,7 +905,7 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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if (index == SPR_LR) {
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// We give up to follow the return address
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// because we have to check the register usage.
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returnAddress = 0;
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return_address = 0;
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}
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}
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@@ -978,8 +978,8 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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}
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}
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if (block->m_instructions > 1)
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ReorderInstructions(block->m_instructions, code);
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if (block->m_num_instructions > 1)
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ReorderInstructions(block->m_num_instructions, code);
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if ((!found_exit && num_inst > 0) || blockSize == 1)
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{
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@@ -992,7 +992,7 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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bool wantsCR0 = true;
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bool wantsCR1 = true;
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bool wantsPS1 = true;
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for (int i = block->m_instructions - 1; i >= 0; i--)
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for (int i = block->m_num_instructions - 1; i >= 0; i--)
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{
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if (code[i].outputCR0)
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wantsCR0 = false;
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@@ -1007,7 +1007,7 @@ u32 PPCAnalyser::Analyse(u32 address, CodeBlock *block, CodeBuffer *buffer, u32
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code[i].wantsCR1 = wantsCR1;
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code[i].wantsPS1 = wantsPS1;
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}
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block->m_instructions = num_inst;
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block->m_num_instructions = num_inst;
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return address;
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}
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