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Code Pull Requests Activity
26,146 Commits 12 Branches 16 Tags
5d449c00e63e9e4dceeda1bca385b6831de12e0f
Commit Graph
98 Commits
Author SHA1 Message Date
gamemasterplc 4908d79a71 Remove Function Address Symbol Mask 
The upper 4 bits were masked out of function addresses prior when generating symbols.
 2017-09-11 15:39:22 -05:00
Sepalani 93b5a5369b SymbolDB: Blank stripped symbol name fixed 2017-08-16 04:07:19 +01:00
Lioncash dd4203bec8 Core: Remove unnecessary includes 
Also moves a cpp file's related header file to the top of the inclusions if it isn't already there.
 2017-06-15 18:52:22 -04:00
Shawn Hoffman e1a3e41bf3 fix various instances of -1 being assigned to unsigned types 2017-06-07 19:52:07 -07:00
Lioncash b676edd80c Core: include what you use 
Eliminates a swath of indirectly included standard headers
 2017-06-07 01:20:48 -04:00
Leo Lam 5d6074f157 Merge pull request #5366 from sepalani/set-sym-size 
CodeView: Set Symbol Size/End Address added
 2017-06-03 19:00:45 +02:00
Sepalani aa65ca4b6b PPCAnalyst: Use the proper RAM check 2017-05-17 02:10:26 +01:00
Sepalani 40c243df28 PPCAnalyst: Fix off by one instruction 2017-05-07 04:56:16 +01:00
Sepalani 93ba6aa9f2 PPCAnalyst: Function calls without link added 2017-05-07 04:55:36 +01:00
Sepalani 95d0a48759 PPCAnalyst: EvaluateBranchTarget improved 2017-05-07 04:55:36 +01:00
Sepalani 7f552581e7 CodeView: Set Symbol Size added 2017-05-06 13:18:00 +01:00
Mat M 7c3905a612 Merge pull request #5140 from sepalani/signature_db 
SignatureDB: Rewrite FormatHandler API
 2017-05-02 19:23:46 -04:00
Sepalani 2f0f63fdbc PPCAnalyst: Prevent a crash when outside the RAM 2017-04-30 02:45:10 +01:00
Anthony cb2e7a6cac Merge pull request #5240 from sepalani/find_handlers 
PPCAnalyst: Find interrupt/exception handlers
 2017-04-29 12:44:41 -07:00
Anthony 4d3a794942 Merge pull request #5238 from sepalani/ppc-analyst-rfi 
PPCAnalyst: Support return from interrupt
 2017-04-29 12:44:18 -07:00
Sepalani e8f52e467b PPCAnalyst: Find interrupt/exception handlers 2017-04-29 20:21:21 +01:00
Sepalani 7cee62bbb3 PPCAnalyst: Support return from interrupt 2017-04-29 20:16:31 +01:00
Sepalani dd039cd311 PPCAnalyst: Skip nop alignment 2017-04-29 20:10:52 +01:00
Sepalani 3f2f3679cd PPCAnalyst: Prevent PanicAlert due to invalid read 2017-04-29 20:08:25 +01:00
Sepalani a9b52ce91b SignatureDB: Rewrite FormatHandler API 2017-04-29 19:50:20 +01:00
Sepalani 6eca605284 Fix wrong address in zz_ symbol name 2017-03-25 01:21:13 +00:00
Lioncash aaa6430db6 PPCAnalyst: Make SetInstructionStats' opinfo parameter a const pointer 
trivial const-correctness stuff
 2017-02-18 04:14:26 -05:00
degasus ca10cf5afe PPCAnalyst: Update comments 2017-01-28 03:03:04 +01:00
degasus f31b25fe39 Jit64: Enable branch following. 2017-01-28 02:48:56 +01:00
degasus 70caf447b9 JitCache: Get physical addresses from PPCAnalyst. 
So we support all kind of degenerated blocks now, not just range+length based ones.
 2017-01-23 20:33:44 +01:00
degasus 3529af61c4 JitAnalyzer: Remove jit block cache workaround. 2017-01-23 20:33:44 +01:00
Sepalani a6114bad34 Import/Export signature files as CSV 2016-12-18 00:27:10 +00:00
Léo Lam 39fd6dcd5b Fix missing includes 
Aren't indirect includes great?
 2016-10-07 23:46:41 +02:00
Markus Wick cf3513f7fc Merge pull request #4123 from hthh/improve-const-stores 
Jit: FIFO optimization improvements
 2016-10-04 08:32:48 +02:00
Lioncash e1705ba6c5 PPCAnalyst: Get rid of two casts 
HostRead_Instruction does the same thing behind the scenes without casts.
 2016-09-29 18:17:56 -04:00
Lioncash ba628b3cab PPCAnalyst: Compress loop into std::any_of 2016-09-28 17:12:21 -04:00
Lioncash 082275d785 PPCAnalyst: Convert #define into a constant 2016-09-26 20:04:17 -04:00
Lioncash a947391556 PPCAnalyst: Make local constants constexpr 2016-09-26 19:51:48 -04:00
Lioncash 00ddbee786 SymbolDB: Change Symbol's 'analyzed' member into a boolean 
It's only ever used as one
 2016-09-13 21:23:28 -04:00
hthh 789975e350 Jit: FIFO optimization improvements 
This introduces speculative constants, allowing FIFO writes to be
optimized in more places.

It also clarifies the guarantees of the FIFO optimization, changing
the location of some of the checks and potentially avoiding redundant
checks.
 2016-08-15 20:09:52 +10:00
Pierre Bourdon 3570c7f03a Reformat all the things. Have fun with merge conflicts. 2016-06-24 10:43:46 +02:00
Lioncash d9a16f7c9c Interpreter: Remove unnecessary includes from Interpreter.h 
Previously the JIT code relied on indirect inclusion from this header,
this gets rid of that.
 2016-01-10 18:51:12 -05:00
Pringo aaa67ca57e Update Issue Tracker Link in Comment 2015-12-02 09:01:28 -08:00
degasus bceab37801 PPCAnalyst: Mark function as static 2015-08-09 11:15:44 +02:00
Tillmann Karras 0d3acbd9c7 PPCAnalyst: drop needless forward declarations 2015-08-06 10:39:43 +02:00
Scott Mansell a31ebb9bcd PPCAnalyst: Don't swap instruction which might cause interrupts. 
fcmpo and fcmpu can be matched by the REORDER_CMP pass, as they set CR0
and they can cause interrupts if the fpu is disabled.
So we add an extra check to make sure op a is an integer op too.
 2015-07-07 22:37:48 +12:00
degasus c375111076 Options: merge SCoreStartupParameter into SConfig 2015-06-12 19:07:45 +02:00
Tillmann Karras 30ebb2459e Set copyright year to when a file was created 2015-05-25 13:22:31 +02:00
Tillmann Karras cefcb0ace9 Update license headers to GPLv2+ 2015-05-25 13:22:31 +02:00
Lioncash a11bbe6fea PPCTables: Remove FL_OUT_S. 
This is unused, and since it had the same value as FL_OUT_D, it was unnecessarily setting the rS register as an output, even on instructions that only have FL_OUT_D set.
 2015-03-03 16:23:28 -05:00
Lioncash 7c244766dc Interpreter: Use correct destination for psq_l, psq_lx, psq_lu, and psq_lux. 
Gekko manual defines these as storing to rD, not rS.

Also removed FL_OUT_FLOAT_S, since nothing uses it now.
 2015-02-21 21:20:41 -05:00
magumagu 985087c7e2 Make all unknown opcodes behave consistently. 
Consistently fall back to the interpreter for unknown instructions, and
make sure GetOpInfo() always returns a non-null pointer.
 2015-02-11 22:18:33 -08:00
magumagu e136c8a066 PowerPC: misc cleanup. 2015-02-11 13:56:36 -08:00
magumagu ac54c6a4e2 Make address translation respect the CPU translation mode. 
The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.

This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.

This does very little on its own, but it's the first step to a correct BAT
implementation.
 2015-02-11 13:56:22 -08:00
magumagu 0f96a0104e Merge pull request #1752 from Buddybenj/clean-up 
Clean Up
 2015-02-10 11:39:14 -08:00