It looks like the debug output is also output as SJIS (similar to
OSReport text), so we need to convert it to UTF-8 to prevent it from
all showing up as �.
This doesn't fix all display issues, but fixes all SJIS/UTF-8 related
ones.
This changes GetSymbolFromName to not require the passed name to
completely match with the symbol name. Instead, we now match
against the stripped symbol name (i.e. only the function name).
This fixes a regression introduced by #4160, which prevented
HLE::PatchFunctions() from working properly.
Call Advance at the start of each timing slice instead of the end.
Possibly fixed a bug where a slice would randomly branch straight
back to Advance() because the flags were not set to the right
values before branching to the dispatcher entrypoint.
This fix a double break bug when hitting a memcheck and hitting play on the same instruction it broke to earlier. The state is put back to CPU_RUNNING after.
These are needed for the next commit. I had to modify the implementation of the DSP one too, but since it basically isn`t used, I don`t think it matters much. These options only matters when adding one.
It wouldn't impact performance until at least one memcheck is enabled. Because of this, it can be used in release builds without much impact, the only thing that woudl change is the use of HasAny method instead of preprocessor conditionals. Since the perforamnce decrease comes right when the first memcheck is added and restored when the last is removed, it basically is all beneficial and works the same way.
The min-heap provides no ordering when the key is the same on 2
nodes. Disambiguate identical times by tracking the order items
were added into the queue.
Now that our timings are much more accurate it doesn't look like we
need it anymore. And the instant ARAM DMA mode + scheduling fixes
ctually breaks ATV: Quad Power Racing 2 (causing all sorts of werid
bugs).
Fundamentally, all this does is enforce the invariant that we always
translate effective addresses based on the current BAT registers and
page table before we do anything else with them.
This change can be logically divided into three parts. The first part is
creating a table to represent the current BAT state, and keeping it up to
date (PowerPC::IBATUpdated, PowerPC::DBATUpdated, etc.). This does
nothing by itself, but it's necessary for the other parts.
The second part (mostly in MMU.cpp) is simply removing all the hardcoded
checks for specific untranslated addresses, and consistently translating
addresses using the current BAT configuration. Very straightforward, but a
lot of code changes because we hardcoded assumptions all over the place.
The third part (mostly in Memmap.cpp) is making the fastmem arena reflect
the current BAT configuration. We do this by redoing the mapping (calling
memmap()) based on the BAT table whenever it changes.
One additional minor change is that translation can fail in two ways:
either the segment is a direct store segment, or page table lookup failed.
The difference doesn't usually matter, but the difference affects cache
instructions, like dcbz.
For step over, it was updating twice which actually made the red display on the register view (when a register changes since) malfunction. Since it doesn't seem to be usefull to update before AND after the run, the one before the run was removed.
For step out, well, because there was no chances given for the thread to run as it is single stepping all the time, I only added a call to update after it was done.
Init cannot be called more than once because it registers the
CoreTiming callbacks, that trips the assertions and will cause
anyone with PanicAlerts disabled to crash.
