forked from dolphin-emu/dolphin
		
	git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5248 8ced0084-cf51-0410-be5f-012b33b47a6e
		
			
				
	
	
		
			198 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			198 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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// Additional copyrights go to Duddie and Tratax (c) 2004
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// HELPER FUNCTIONS
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#include "DSPIntCCUtil.h"
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#include "DSPCore.h"
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#include "DSPInterpreter.h"
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namespace DSPInterpreter {
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void Update_SR_Register64(s64 _Value, bool carry, bool overflow)
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{
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	g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
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	// 0x01
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	if (carry)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_CARRY;
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	}
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	// 0x02 and 0x80
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	if (overflow)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_OVERFLOW;
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		g_dsp.r[DSP_REG_SR]  |= SR_OVERFLOW_STICKY; 
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	}
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	// 0x04
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	if (_Value == 0)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
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	}
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	// 0x08
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	if (_Value < 0)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_SIGN;
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	}
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	// 0x10
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	if (_Value != (s32)_Value)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_OVER_S32;
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	}
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	// 0x20 - Checks if top bits of m are equal
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	if (((_Value & 0xc0000000) == 0) || ((_Value & 0xc0000000) == 0xc0000000))
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
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	}
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}
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void Update_SR_Register16(s16 _Value, bool carry, bool overflow, bool overS32)
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{
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	g_dsp.r[DSP_REG_SR] &= ~SR_CMP_MASK;
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	// 0x01
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	if (carry)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_CARRY;
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	}
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	// 0x02 and 0x80
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	if (overflow)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_OVERFLOW;
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		g_dsp.r[DSP_REG_SR]  |= SR_OVERFLOW_STICKY; 
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	}
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	// 0x04
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	if (_Value == 0)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_ARITH_ZERO;
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	}
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	// 0x08 
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	if (_Value < 0)
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_SIGN;
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	}
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	// 0x10
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	if (overS32) 
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_OVER_S32;
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	}
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	// 0x20 - Checks if top bits of m are equal
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	if ((((u16)_Value >> 14) == 0) || (((u16)_Value >> 14) == 3))
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	{
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		g_dsp.r[DSP_REG_SR] |= SR_TOP2BITS;
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	}
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}
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void Update_SR_LZ(bool value) {
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	if (value == true) 
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		g_dsp.r[DSP_REG_SR] |= SR_LOGIC_ZERO; 
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	else
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		g_dsp.r[DSP_REG_SR] &= ~SR_LOGIC_ZERO;
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}
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inline int GetMultiplyModifier()
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{
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	return (g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY)?1:2;
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}
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inline bool isCarry() {
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	return (g_dsp.r[DSP_REG_SR] & SR_CARRY) ? true : false;
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}
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inline bool isOverflow() {
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	return (g_dsp.r[DSP_REG_SR] & SR_OVERFLOW) ? true : false;
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}
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inline bool isOverS32() {
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	return (g_dsp.r[DSP_REG_SR] & SR_OVER_S32) ? true : false;
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}
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inline bool isLess() {
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	return ((bool)(g_dsp.r[DSP_REG_SR] & SR_OVERFLOW) != (bool)(g_dsp.r[DSP_REG_SR] & SR_SIGN));
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}
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inline bool isZero() {
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	return (g_dsp.r[DSP_REG_SR] & SR_ARITH_ZERO) ? true : false;
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}
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inline bool isLogicZero() {
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	return (g_dsp.r[DSP_REG_SR] & SR_LOGIC_ZERO) ? true : false;
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}
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inline bool isConditionA() {
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	return (((g_dsp.r[DSP_REG_SR] & SR_OVER_S32) || (g_dsp.r[DSP_REG_SR] & SR_TOP2BITS)) && !(g_dsp.r[DSP_REG_SR] & SR_ARITH_ZERO)) ? true : false;
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}
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//see DSPCore.h for flags
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bool CheckCondition(u8 _Condition)
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{
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	switch (_Condition & 0xf)
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	{
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	case 0x0: // GE - Greater Equal
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		return !isLess();
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	case 0x1: // L - Less
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		return isLess();
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	case 0x2: // G - Greater
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		return !isLess() && !isZero();
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	case 0x3: // LE - Less Equal
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		return isLess() || isZero();
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	case 0x4: // NZ - Not Zero
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		return !isZero();
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	case 0x5: // Z - Zero 
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		return isZero();
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	case 0x6: // NC - Not carry
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		return !isCarry();
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	case 0x7: // C - Carry 
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		return isCarry();
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	case 0x8: // ? - Not over s32
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		return !isOverS32();
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	case 0x9: // ? - Over s32
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		return isOverS32();
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	case 0xa: // ?
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		return isConditionA();
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	case 0xb: // ?
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		return !isConditionA();
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	case 0xc: // LNZ  - Logic Not Zero
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		return !isLogicZero();
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	case 0xd: // LZ - Logic Zero
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		return isLogicZero();
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	case 0xe: // 0 - Overflow
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		return isOverflow();
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	case 0xf: // Empty - always true.
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		return true;
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	default:
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		return true;
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	}
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}
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}  // namespace
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