forked from dolphin-emu/dolphin
b787f5f8f7
thinks to note - All ext commands should call zeroWriteBackLog() (before changing any reg) - increase/decrease ar functions now only return a value not actually change anything git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4018 8ced0084-cf51-0410-be5f-012b33b47a6e
563 lines
15 KiB
C++
563 lines
15 KiB
C++
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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// Additional copyrights go to Duddie and Tratax (c) 2004
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// Multiplier and product register control
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#include "DSPInterpreter.h"
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#include "DSPIntCCUtil.h"
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#include "DSPIntUtil.h"
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namespace DSPInterpreter {
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// Sets prod as a side effect.
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// Only MULX family instructions have unsigned support.
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s64 dsp_multiply_conditional_unsigned(u16 a, u16 b)
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{
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s64 prod;
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// FIXME: Makes AX games sound horrible. Verified through DSPSpy :/
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if (g_dsp.r[DSP_REG_SR] & SR_MUL_UNSIGNED)
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prod = (u64)a * (u64)b; // won't overflow 32-bits
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else
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prod = (s32)(s16)a * (s32)(s16)b; // won't overflow 32-bits
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// Conditionally multiply by 2.
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if ((g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY) == 0)
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prod <<= 1;
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// Store the product, and return it, in case the caller wants to read it.
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dsp_set_long_prod(prod);
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return prod;
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}
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// Sets prod as a side effect.
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s64 dsp_multiply(u16 a, u16 b)
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{
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s64 prod;
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prod = (s32)(s16)a * (s32)(s16)b; // won't overflow 32-bits
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// Conditionally multiply by 2.
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if ((g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY) == 0)
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prod <<= 1;
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// Store the product, and return it, in case the caller wants to read it.
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dsp_set_long_prod(prod);
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return prod;
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}
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s64 dsp_multiply_add(u16 a, u16 b)
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{
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s64 prod = (s32)(s16)a * (s32)(s16)b; // won't overflow 32-bits
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// Conditionally multiply by 2.
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if ((g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY) == 0)
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prod <<= 1;
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// Add the original prod value.
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prod += dsp_get_long_prod();
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// Store the product, and return it, in case the caller wants to read it.
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dsp_set_long_prod(prod);
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return prod;
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}
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s64 dsp_multiply_sub(u16 a, u16 b)
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{
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s64 prod = (s32)(s16)a * (s32)(s16)b; // won't overflow 32-bits
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// Conditionally multiply by 2.
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if ((g_dsp.r[DSP_REG_SR] & SR_MUL_MODIFY) == 0)
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prod <<= 1;
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// Subtract from the original prod value.
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prod = dsp_get_long_prod() - prod;
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// Store the product, and return it, in case the caller wants to read it.
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dsp_set_long_prod(prod);
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return prod;
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}
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// CLRP
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// 1000 0100 xxxx xxxx
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// Clears product register $prod.
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void clrp(const UDSPInstruction& opc)
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{
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// Magic numbers taken from duddie's doc
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// These are probably a bad idea to put here.
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zeroWriteBackLog();
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g_dsp.r[0x14] = 0x0000;
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g_dsp.r[0x15] = 0xfff0;
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g_dsp.r[0x16] = 0x00ff;
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g_dsp.r[0x17] = 0x0010;
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}
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// MOVP $acD
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// 0110 111d xxxx xxxx
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// Moves multiply product from $prod register to accumulator $acD register.
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void movp(const UDSPInstruction& opc)
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{
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u8 dreg = (opc.hex >> 8) & 0x1;
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s64 prod = dsp_get_long_prod();
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zeroWriteBackLog();
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dsp_set_long_acc(dreg, prod);
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Update_SR_Register64(prod);
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}
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// MOVNP $acD
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// 0111 111d xxxx xxxx
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// Moves negative of multiply product from $prod register to accumulator
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// $acD register.
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void movnp(const UDSPInstruction& opc)
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{
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u8 dreg = (opc.hex >> 8) & 0x1;
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s64 prod = dsp_get_long_prod();
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s64 acc = -prod;
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zeroWriteBackLog();
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dsp_set_long_acc(dreg, acc);
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Update_SR_Register64(acc);
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}
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// ADDPAXZ $acD, $axS
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// 1111 10sd xxxx xxxx
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// Adds secondary accumulator $axS to product register and stores result
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// in accumulator register. Low 16-bits of $acD ($acD.l) are set to 0.
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void addpaxz(const UDSPInstruction& opc)
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{
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u8 dreg = (opc.hex >> 8) & 0x1;
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u8 sreg = (opc.hex >> 9) & 0x1;
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s64 prod = dsp_get_long_prod() & ~0xffff; // hm, should we really mask here?
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s64 ax = dsp_get_long_acx(sreg);
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s64 acc = (prod + ax) & ~0xffff;
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zeroWriteBackLog();
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dsp_set_long_acc(dreg, acc);
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Update_SR_Register64(acc);
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}
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// MOVPZ $acD
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// 1111 111d xxxx xxxx
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// Moves multiply product from $prod register to accumulator $acD
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// register and sets $acD.l to 0
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void movpz(const UDSPInstruction& opc)
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{
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u8 dreg = (opc.hex >> 8) & 0x01;
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// overwrite acc and clear low part
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s64 prod = dsp_get_long_prod();
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s64 acc = prod & ~0xffff;
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zeroWriteBackLog();
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dsp_set_long_acc(dreg, acc);
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Update_SR_Register64(acc);
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}
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// MULC $acS.m, $axT.h
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// 110s t000 xxxx xxxx
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// Multiply mid part of accumulator register $acS.m by high part $axS.h of
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// secondary accumulator $axS (treat them both as signed).
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void mulc(const UDSPInstruction& opc)
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{
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u8 sreg = (opc.hex >> 11) & 0x1;
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u8 treg = (opc.hex >> 12) & 0x1;
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u16 accm = dsp_get_acc_m(sreg);
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u16 axh = dsp_get_ax_h(treg);
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zeroWriteBackLog();
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s64 prod = dsp_multiply(accm, axh);
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Update_SR_Register64(prod);
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}
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// MULCMVZ $acS.m, $axT.h, $acR
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// 110s t01r xxxx xxxx
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// (fixed possible bug in duddie's description, s->t)
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// Multiply mid part of accumulator register $acS.m by high part $axT.h of
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// secondary accumulator $axT (treat them both as signed). Move product
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// register before multiplication to accumulator $acR, set low part of
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// accumulator $acR.l to zero.
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void mulcmvz(const UDSPInstruction& opc)
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{
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s64 TempProd = dsp_get_long_prod();
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// update prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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u16 accm = dsp_get_acc_m(sreg);
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u16 axh = dsp_get_ax_h(treg);
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zeroWriteBackLog();
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dsp_multiply(accm, axh);
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// update acc
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u8 rreg = (opc.hex >> 8) & 0x1;
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s64 acc = TempProd & ~0xffff; // clear lower 4 bytes
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dsp_set_long_acc(rreg, acc);
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Update_SR_Register64(acc);
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}
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// MULCMV $acS.m, $axT.h, $acR
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// 110s t11r xxxx xxxx
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// Multiply mid part of accumulator register $acS.m by high part $axT.h of
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// secondary accumulator $axT (treat them both as signed). Move product
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// register before multiplication to accumulator $acR.
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// possible mistake in duddie's doc axT.h rather than axS.h
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void mulcmv(const UDSPInstruction& opc)
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{
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s64 old_prod = dsp_get_long_prod();
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// update prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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u16 accm = dsp_get_acc_m(sreg);
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u16 axh = dsp_get_ax_h(treg);
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zeroWriteBackLog();
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dsp_multiply(accm, axh);
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// update acc
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u8 rreg = (opc.hex >> 8) & 0x1;
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dsp_set_long_acc(rreg, old_prod);
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Update_SR_Register64(old_prod);
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}
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// MULCAC $acS.m, $axT.h, $acR
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// 110s t10r xxxx xxxx
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// Multiply mid part of accumulator register $acS.m by high part $axS.h of
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// secondary accumulator $axS (treat them both as signed). Add product
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// register before multiplication to accumulator $acR.
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void mulcac(const UDSPInstruction& opc)
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{
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s64 old_prod = dsp_get_long_prod();
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// update prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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u16 accm = dsp_get_acc_m(sreg);
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u16 axh = dsp_get_ax_h(treg);
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zeroWriteBackLog();
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dsp_multiply(accm, axh);
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// update acc
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u8 rreg = (opc.hex >> 8) & 0x1;
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s64 acc = old_prod + dsp_get_long_acc(rreg);
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dsp_set_long_acc(rreg, acc);
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Update_SR_Register64(acc);
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}
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// MUL $axS.l, $axS.h
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// 1001 s000 xxxx xxxx
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// Multiply low part $axS.l of secondary accumulator $axS by high part
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// $axS.h of secondary accumulator $axS (treat them both as signed).
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void mul(const UDSPInstruction& opc)
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{
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u8 sreg = (opc.hex >> 11) & 0x1;
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u16 axl = dsp_get_ax_l(sreg);
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u16 axh = dsp_get_ax_h(sreg);
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zeroWriteBackLog();
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s64 prod = dsp_multiply(axh, axl);
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// FIXME: no update in duddie's docs
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Update_SR_Register64(prod);
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}
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// MULAC $axS.l, $axS.h, $acR
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// 1001 s10r xxxx xxxx
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// Add product register to accumulator register $acR. Multiply low part
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// $axS.l of secondary accumulator $axS by high part $axS.h of secondary
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// accumulator $axS (treat them both as signed).
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void mulac(const UDSPInstruction& opc)
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{
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// add old prod to acc
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u8 rreg = (opc.hex >> 8) & 0x1;
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u8 sreg = (opc.hex >> 11) & 0x1;
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s64 acR = dsp_get_long_acc(rreg) + dsp_get_long_prod();
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u16 axl = dsp_get_ax_l(sreg);
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u16 axh = dsp_get_ax_h(sreg);
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zeroWriteBackLog();
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dsp_set_long_acc(rreg, acR);
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// calculate new prod
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s64 prod = dsp_multiply(axl, axh);
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// FIXME: no update in duddie's docs
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Update_SR_Register64(prod);
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}
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// MULMV $axS.l, $axS.h, $acR
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// 1001 s11r xxxx xxxx
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// Move product register to accumulator register $acR. Multiply low part
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// $axS.l of secondary accumulator $axS by high part $axS.h of secondary
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// accumulator $axS (treat them both as signed).
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void mulmv(const UDSPInstruction& opc)
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{
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u8 rreg = (opc.hex >> 8) & 0x1;
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u8 sreg = ((opc.hex >> 11) & 0x1);
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s64 prod = dsp_get_long_prod();
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s64 acc = prod;
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u16 axl = dsp_get_ax_l(sreg);
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u16 axh = dsp_get_ax_h(sreg);
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zeroWriteBackLog();
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dsp_set_long_acc(rreg, acc);
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prod = dsp_multiply(axl, axh);
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Update_SR_Register64(prod);
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}
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// MULMVZ $axS.l, $axS.h, $acR
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// 1001 s01r xxxx xxxx
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// Move product register to accumulator register $acR and clear low part
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// of accumulator register $acR.l. Multiply low part $axS.l of secondary
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// accumulator $axS by high part $axS.h of secondary accumulator $axS (treat
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// them both as signed).
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void mulmvz(const UDSPInstruction& opc)
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{
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u8 sreg = (opc.hex >> 11) & 0x1;
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u8 rreg = (opc.hex >> 8) & 0x1;
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// overwrite acc and clear low part
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s64 prod = dsp_get_long_prod();
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s64 acc = prod & ~0xffff;
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u16 axl = dsp_get_ax_l(sreg);
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u16 axh = dsp_get_ax_h(sreg);
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zeroWriteBackLog();
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dsp_set_long_acc(rreg, acc);
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// math prod
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prod = dsp_multiply(axl, axh);
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Update_SR_Register64(prod);
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}
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// MULX $ax0.S, $ax1.T
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// 101s t000 xxxx xxxx
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// Multiply one part $ax0 by one part $ax1 (treat them both as signed).
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// Part is selected by S and T bits. Zero selects low part, one selects high part.
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void mulx(const UDSPInstruction& opc)
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{
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u8 sreg = ((opc.hex >> 12) & 0x1);
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u8 treg = ((opc.hex >> 11) & 0x1);
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u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
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u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
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zeroWriteBackLog();
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s64 prod = dsp_multiply_conditional_unsigned(val1, val2);
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Update_SR_Register64(prod);
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}
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// MULXAC $ax0.S, $ax1.T, $acR
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// 101s t01r xxxx xxxx
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// Add product register to accumulator register $acR. Multiply one part
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// $ax0 by one part $ax1 (treat them both as signed). Part is selected by S and
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// T bits. Zero selects low part, one selects high part.
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void mulxac(const UDSPInstruction& opc)
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{
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// add old prod to acc
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u8 rreg = (opc.hex >> 8) & 0x1;
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s64 acR = dsp_get_long_acc(rreg) + dsp_get_long_prod();
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dsp_set_long_acc(rreg, acR);
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// math new prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
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u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
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zeroWriteBackLog();
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s64 prod = dsp_multiply_conditional_unsigned(val1, val2);
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Update_SR_Register64(prod);
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}
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// MULXMV $ax0.S, $ax1.T, $acR
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// 101s t11r xxxx xxxx
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// Move product register to accumulator register $acR. Multiply one part
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// $ax0 by one part $ax1 (treat them both as signed). Part is selected by S and
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// T bits. Zero selects low part, one selects high part.
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void mulxmv(const UDSPInstruction& opc)
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{
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// add old prod to acc
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u8 rreg = ((opc.hex >> 8) & 0x1);
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s64 acR = dsp_get_long_prod();
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dsp_set_long_acc(rreg, acR);
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// math new prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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s16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
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s16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
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zeroWriteBackLog();
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s64 prod = dsp_multiply_conditional_unsigned(val1, val2);
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Update_SR_Register64(prod);
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}
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// MULXMV $ax0.S, $ax1.T, $acR
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// 101s t01r xxxx xxxx
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// Move product register to accumulator register $acR and clear low part
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// of accumulator register $acR.l. Multiply one part $ax0 by one part $ax1 (treat
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// them both as signed). Part is selected by S and T bits. Zero selects low part,
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// one selects high part.
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void mulxmvz(const UDSPInstruction& opc)
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{
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// overwrite acc and clear low part
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u8 rreg = (opc.hex >> 8) & 0x1;
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s64 prod = dsp_get_long_prod();
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s64 acc = prod & ~0xffff;
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dsp_set_long_acc(rreg, acc);
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// math prod
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u8 sreg = (opc.hex >> 12) & 0x1;
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u8 treg = (opc.hex >> 11) & 0x1;
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u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
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u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
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zeroWriteBackLog();
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prod = dsp_multiply_conditional_unsigned(val1, val2);
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Update_SR_Register64(prod);
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|
}
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|
|
|
// MADDX ax0.S ax1.T
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|
// 1110 00st xxxx xxxx
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|
// Multiply one part of secondary accumulator $ax0 (selected by S) by
|
|
// one part of secondary accumulator $ax1 (selected by T) (treat them both as
|
|
// signed) and add result to product register.
|
|
void maddx(const UDSPInstruction& opc)
|
|
{
|
|
u8 sreg = (opc.hex >> 9) & 0x1;
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|
u8 treg = (opc.hex >> 8) & 0x1;
|
|
|
|
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
|
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
|
|
zeroWriteBackLog();
|
|
s64 prod = dsp_multiply_add(val1, val2);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
// MSUBX $(0x18+S*2), $(0x19+T*2)
|
|
// 1110 01st xxxx xxxx
|
|
// Multiply one part of secondary accumulator $ax0 (selected by S) by
|
|
// one part of secondary accumulator $ax1 (selected by T) (treat them both as
|
|
// signed) and subtract result from product register.
|
|
void msubx(const UDSPInstruction& opc)
|
|
{
|
|
u8 sreg = (opc.hex >> 9) & 0x1;
|
|
u8 treg = (opc.hex >> 8) & 0x1;
|
|
|
|
u16 val1 = (sreg == 0) ? dsp_get_ax_l(0) : dsp_get_ax_h(0);
|
|
u16 val2 = (treg == 0) ? dsp_get_ax_l(1) : dsp_get_ax_h(1);
|
|
zeroWriteBackLog();
|
|
s64 prod = dsp_multiply_sub(val1, val2);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
// MADDC $acS.m, $axT.h
|
|
// 1110 10st xxxx xxxx
|
|
// Multiply middle part of accumulator $acS.m by high part of secondary
|
|
// accumulator $axT.h (treat them both as signed) and add result to product
|
|
// register.
|
|
void maddc(const UDSPInstruction& opc)
|
|
{
|
|
u32 sreg = (opc.hex >> 9) & 0x1;
|
|
u32 treg = (opc.hex >> 8) & 0x1;
|
|
u16 accm = dsp_get_acc_m(sreg);
|
|
u16 axh = dsp_get_ax_h(treg);
|
|
zeroWriteBackLog();
|
|
s64 prod = dsp_multiply_add(accm, axh);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
// MSUBC $acS.m, $axT.h
|
|
// 1110 11st xxxx xxxx
|
|
// Multiply middle part of accumulator $acS.m by high part of secondary
|
|
// accumulator $axT.h (treat them both as signed) and subtract result from
|
|
// product register.
|
|
void msubc(const UDSPInstruction& opc)
|
|
{
|
|
u32 sreg = (opc.hex >> 9) & 0x1;
|
|
u32 treg = (opc.hex >> 8) & 0x1;
|
|
u16 accm = dsp_get_acc_m(sreg);
|
|
u16 axh = dsp_get_ax_h(treg);
|
|
zeroWriteBackLog();
|
|
s64 prod = dsp_multiply_sub(accm, axh);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
// MADD $axS.l, $axS.h
|
|
// 1111 001s xxxx xxxx
|
|
// Multiply low part $axS.l of secondary accumulator $axS by high part
|
|
// $axS.h of secondary accumulator $axS (treat them both as signed) and add
|
|
// result to product register.
|
|
void madd(const UDSPInstruction& opc)
|
|
{
|
|
u8 sreg = (opc.hex >> 8) & 0x1;
|
|
u16 axl = dsp_get_ax_l(sreg);
|
|
u16 axh = dsp_get_ax_h(sreg);
|
|
|
|
zeroWriteBackLog();
|
|
|
|
s64 prod = dsp_multiply_add(axl, axh);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
// MSUB $axS.l, $axS.h
|
|
// 1111 011s xxxx xxxx
|
|
// Multiply low part $axS.l of secondary accumulator $axS by high part
|
|
// $axS.h of secondary accumulator $axS (treat them both as signed) and
|
|
// subtract result from product register.
|
|
void msub(const UDSPInstruction& opc)
|
|
{
|
|
u8 sreg = (opc.hex >> 8) & 0x1;
|
|
u16 axl = dsp_get_ax_l(sreg);
|
|
u16 axh = dsp_get_ax_h(sreg);
|
|
|
|
zeroWriteBackLog();
|
|
|
|
s64 prod = dsp_multiply_sub(axl, axh);
|
|
Update_SR_Register64(prod);
|
|
}
|
|
|
|
} // namespace
|