forked from dolphin-emu/dolphin
92ef4f1156
2. Fixed Issue 1909 Multi-Nunchuck control problem 3. Updated SYSCONF, which should enable games that require MotionPlus, such as "Wii Sports Resort" git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4773 8ced0084-cf51-0410-be5f-012b33b47a6e
736 lines
27 KiB
C++
736 lines
27 KiB
C++
// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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// NOTES (mb2):
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// * GP/CPU sync can be done by several way:
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// - MP1 use BP (breakpoint) in movie-menus and mostly PEtoken in 3D
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// - ZWW as Crazy Taxi: PEfinish (GXSetDrawDone)
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// - SMS: BP, PEToken, PEfinish
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// - ZTP: seems to use PEfinish only
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// - Animal Crossing: PEfinish at start but there's a bug...
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// There's tons of HiWmk/LoWmk ping pong -> Another sync fashion?
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// - Super Monkey Ball Adventures: PEToken. Oddity: read&check-PEToken-value-loop stays
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// in its JITed block (never fall in Advance() until the game-watchdog's stuff).
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// That's why we can't let perform the AdvanceCallBack as usual.
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// The PEToken is volatile now and in the fifo struct.
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// - Super Monkey Ball: PEFinish. This game has the lamest way to deal with fifo sync for our MT's stuff.
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// A hack is mandatory. DONE and should be ok for other games.
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// *What I guess (thx to asynchronous DualCore mode):
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// PPC have a frame-finish watchdog. Handled by system timming stuff like the decrementer.
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// (DualCore mode): I have observed, after ZTP logos, a fifo-recovery start when DECREMENTER_EXCEPTION is throwned.
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// The frame setting (by GP) took too much time and didn't finish properly due to this watchdog.
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// Faster GX plugins required, indeed :p
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// * BPs are needed for some game GP/CPU sync.
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// But it could slowdown (MP1 at least) because our GP in DC is faster than "expected" in some area.
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// eg: in movie-menus in MP1, BP are reached quickly.
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// The bad thing is that involve too much PPC work (int ack, lock GP, reset BP, new BP addr, unlock BP...) hence the slowdown.
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// Anyway, emulation should more accurate like this and it emulate some sort of better load balancing.
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// Eather way in those area a more accurate GP timing could be done by slowing down the GP or something less stupid.
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// Not functional and not used atm (breaks MP2).
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// * funny, in revs before those with this note, BP irq wasn't cleared (a bug indeed) and MP1 menus was faster.
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// BP irq was raised and ack just once but never cleared. However it's sufficient for MP1 to work.
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// This hack is used atm. Known BPs handling doesn't work well (btw, BP irq clearing might be done by CPIntEnable raising edge).
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// The hack seems to be responsible of the movie stutering in MP1 menus.
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// TODO (mb2):
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// * raise watermark Ov/Un irq: POINTLESS since emulated GP timings can't be accuratly set.
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// Only 3 choices IMHO for a correct emulated load balancing in DC mode:
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// - make our own GP watchdog hack that can lock CPU if GP too slow. STARTED
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// - hack directly something in PPC timings (dunno how)
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// - boost GP so we can consider it as infinitely fast compared to CPU.
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// * raise ReadIdle/CmdIdle flags and observe behaviour of MP1 & ZTP (at least)
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// * Clean useless comments and debug stuff in Read16, Write16, GatherPipeBursted when sync will be fixed for DC
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// * (reminder) do the same in:
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// PeripheralInterface.cpp, PixelEngine.cpp, OGL->BPStructs.cpp, fifo.cpp... ok just check change log >>
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// TODO
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// * Kick GPU from dispatcher, not from writes
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// * Thunking framework
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// * Cleanup of messy now unnecessary safety code in jit
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#include "Common.h"
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#include "VideoCommon.h"
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#include "MathUtil.h"
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#include "Thread.h"
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#include "Atomic.h"
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#include "Fifo.h"
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#include "ChunkFile.h"
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#include "CommandProcessor.h"
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namespace CommandProcessor
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{
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int et_UpdateInterrupts;
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void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate)
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{
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UpdateInterrupts((userdata) ? true : false);
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}
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// look for 1002 verts, breakpoint there, see why next draw is flushed
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// TODO(ector): Warn on bbox read/write
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// STATE_TO_SAVE
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SCPFifoStruct fifo;
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UCPStatusReg m_CPStatusReg;
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UCPCtrlReg m_CPCtrlReg;
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UCPClearReg m_CPClearReg;
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int m_bboxleft;
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int m_bboxtop;
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int m_bboxright;
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int m_bboxbottom;
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u16 m_tokenReg;
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static u32 fake_GPWatchdogLastToken = 0;
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static Common::Event s_fifoIdleEvent;
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static Common::CriticalSection sFifoCritical;
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void FifoCriticalEnter()
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{
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sFifoCritical.Enter();
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}
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void FifoCriticalLeave()
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{
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sFifoCritical.Leave();
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}
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void DoState(PointerWrap &p)
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{
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p.Do(m_CPStatusReg);
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p.Do(m_CPCtrlReg);
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//p.Do(m_CPClearReg);
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p.Do(m_bboxleft);
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p.Do(m_bboxtop);
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p.Do(m_bboxright);
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p.Do(m_bboxbottom);
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p.Do(m_tokenReg);
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p.Do(fifo);
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}
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//inline void WriteLow (u32& _reg, u16 lowbits) {_reg = (_reg & 0xFFFF0000) | lowbits;}
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//inline void WriteHigh(u32& _reg, u16 highbits) {_reg = (_reg & 0x0000FFFF) | ((u32)highbits << 16);}
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inline void WriteLow (volatile u32& _reg, u16 lowbits) {Common::AtomicStore(_reg,(_reg & 0xFFFF0000) | lowbits);}
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inline void WriteHigh(volatile u32& _reg, u16 highbits) {Common::AtomicStore(_reg,(_reg & 0x0000FFFF) | ((u32)highbits << 16));}
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inline u16 ReadLow (u32 _reg) {return (u16)(_reg & 0xFFFF);}
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inline u16 ReadHigh (u32 _reg) {return (u16)(_reg >> 16);}
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void Init()
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{
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m_CPStatusReg.Hex = 0;
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m_CPStatusReg.CommandIdle = 1; // Seems not used
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m_CPStatusReg.ReadIdle = 1;
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m_CPCtrlReg.Hex = 0;
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m_bboxleft = 0;
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m_bboxtop = 0;
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m_bboxright = 640;
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m_bboxbottom = 480;
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m_tokenReg = 0;
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fake_GPWatchdogLastToken = 0;
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memset(&fifo,0,sizeof(fifo));
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fifo.CPCmdIdle = 1 ;
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fifo.CPReadIdle = 1;
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fifo.bFF_Breakpoint = 1;
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s_fifoIdleEvent.Init();
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et_UpdateInterrupts = g_VideoInitialize.pRegisterEvent("UpdateInterrupts", UpdateInterrupts_Wrapper);
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}
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void Shutdown()
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{
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s_fifoIdleEvent.Shutdown();
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}
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void Read16(u16& _rReturnValue, const u32 _Address)
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{
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DEBUG_LOG(COMMANDPROCESSOR, "(r): 0x%08x", _Address);
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switch (_Address & 0xFFF)
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{
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case STATUS_REGISTER:
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//TODO?: if really needed
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//m_CPStatusReg.CommandIdle = fifo.CPCmdIdle;
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//m_CPStatusReg.CommandIdle = fifo.CPReadIdle;
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// uncomment: change a bit the behaviour MP1. Not very useful though
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// hack: CPU will always believe fifo is empty and on idle
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//m_CPStatusReg.ReadIdle = 1;
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//m_CPStatusReg.CommandIdle = 1;
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m_CPStatusReg.Breakpoint = fifo.bFF_Breakpoint;
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_rReturnValue = m_CPStatusReg.Hex;
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// Clear on read
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UpdateInterrupts(false);
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DEBUG_LOG(COMMANDPROCESSOR, "(r) status: iBP %s | fReadIdle %s | fCmdIdle %s | iOvF %s | iUndF %s"
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, m_CPStatusReg.Breakpoint ? "ON" : "OFF"
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, m_CPStatusReg.ReadIdle ? "ON" : "OFF"
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, m_CPStatusReg.CommandIdle ? "ON" : "OFF"
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, m_CPStatusReg.OverflowHiWatermark ? "ON" : "OFF"
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, m_CPStatusReg.UnderflowLoWatermark ? "ON" : "OFF"
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);
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return;
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case CTRL_REGISTER: _rReturnValue = m_CPCtrlReg.Hex; return;
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case CLEAR_REGISTER:
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_rReturnValue = m_CPClearReg.Hex;
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DEBUG_LOG(COMMANDPROCESSOR, "(r) clear: 0x%04x", _rReturnValue);
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return;
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case FIFO_TOKEN_REGISTER: _rReturnValue = m_tokenReg; return;
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case FIFO_BOUNDING_BOX_LEFT: _rReturnValue = m_bboxleft; return;
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case FIFO_BOUNDING_BOX_RIGHT: _rReturnValue = m_bboxright; return;
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case FIFO_BOUNDING_BOX_TOP: _rReturnValue = m_bboxtop; return;
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case FIFO_BOUNDING_BOX_BOTTOM: _rReturnValue = m_bboxbottom; return;
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case FIFO_BASE_LO: _rReturnValue = ReadLow (fifo.CPBase); return;
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case FIFO_BASE_HI: _rReturnValue = ReadHigh(fifo.CPBase); return;
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case FIFO_END_LO: _rReturnValue = ReadLow (fifo.CPEnd); return;
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case FIFO_END_HI: _rReturnValue = ReadHigh(fifo.CPEnd); return;
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case FIFO_HI_WATERMARK_LO: _rReturnValue = ReadLow (fifo.CPHiWatermark); return;
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case FIFO_HI_WATERMARK_HI: _rReturnValue = ReadHigh(fifo.CPHiWatermark); return;
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case FIFO_LO_WATERMARK_LO: _rReturnValue = ReadLow (fifo.CPLoWatermark); return;
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case FIFO_LO_WATERMARK_HI: _rReturnValue = ReadHigh(fifo.CPLoWatermark); return;
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// TODO: cases cleanup
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case FIFO_RW_DISTANCE_LO:
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// hack: CPU will always believe fifo is empty and on idle
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// But even if you return the true value, most games just don't care
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//_rReturnValue = ReadLow (fifo.CPReadWriteDistance);
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_rReturnValue = 0;
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_RW_DISTANCE_LO : %04x", _rReturnValue);
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return;
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case FIFO_RW_DISTANCE_HI:
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// hack: CPU will always believe fifo is empty and on idle
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// But even if you return the true value, most games just don't care
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//_rReturnValue = ReadHigh(fifo.CPReadWriteDistance);
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_rReturnValue = 0;
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_RW_DISTANCE_HI : %04x", _rReturnValue);
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return;
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case FIFO_WRITE_POINTER_LO:
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_rReturnValue = ReadLow (fifo.CPWritePointer);
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_WRITE_POINTER_LO : %04x", _rReturnValue);
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return;
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case FIFO_WRITE_POINTER_HI:
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_rReturnValue = ReadHigh(fifo.CPWritePointer);
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_WRITE_POINTER_HI : %04x", _rReturnValue);
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return;
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case FIFO_READ_POINTER_LO:
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// hack: CPU will always believe fifo is empty and on idle
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// But even if you return the true value, most games just don't care
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//_rReturnValue = ReadLow (fifo.CPReadPointer);
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_rReturnValue = ReadLow (fifo.CPWritePointer);
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_READ_POINTER_LO : %04x", _rReturnValue);
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return;
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case FIFO_READ_POINTER_HI:
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// hack: CPU will always believe fifo is empty and on idle
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// But even if you return the true value, most games just don't care
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//_rReturnValue = ReadHigh(fifo.CPReadPointer);
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_rReturnValue = ReadHigh(fifo.CPWritePointer);
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DEBUG_LOG(COMMANDPROCESSOR, "read FIFO_READ_POINTER_HI : %04x", _rReturnValue);
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return;
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case FIFO_BP_LO: _rReturnValue = ReadLow (fifo.CPBreakpoint); return;
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case FIFO_BP_HI: _rReturnValue = ReadHigh(fifo.CPBreakpoint); return;
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// AyuanX: Lots of games read the followings (e.g. Mario Power Tennis)
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case XF_RASBUSY_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_RASBUSY_L: %04x", _rReturnValue);
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return;
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case XF_RASBUSY_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_RASBUSY_H: %04x", _rReturnValue);
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return;
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case XF_CLKS_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_CLKS_L: %04x", _rReturnValue);
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return;
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case XF_CLKS_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_CLKS_H: %04x", _rReturnValue);
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return;
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case XF_WAIT_IN_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_IN_L: %04x", _rReturnValue);
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return;
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case XF_WAIT_IN_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_IN_H: %04x", _rReturnValue);
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return;
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case XF_WAIT_OUT_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_OUT_L: %04x", _rReturnValue);
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return;
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case XF_WAIT_OUT_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_OUT_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_CHECK_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_CHECK_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_CHECK_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_CHECK_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_MISS_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_MISS_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_MISS_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_MISS_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_STALL_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_STALL_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_STALL_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_STALL_H: %04x", _rReturnValue);
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return;
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case CLKS_PER_VTX_OUT:
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_rReturnValue = 4; //Number of clocks per vertex.. TODO: Calculate properly
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WARN_LOG(COMMANDPROCESSOR, "Read from CLKS_PER_VTX_OUT: %04x", _rReturnValue);
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return;
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//add all the other regs here? are they ever read?
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default:
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_rReturnValue = 0;
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WARN_LOG(COMMANDPROCESSOR, "(r16) unknown CP reg @ %08x", _Address);
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return;
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}
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return;
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}
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void Write16(const u16 _Value, const u32 _Address)
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{
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bool bUpdate = false;
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INFO_LOG(COMMANDPROCESSOR, "(write16): 0x%04x @ 0x%08x",_Value,_Address);
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//Spin until queue is empty - it WILL become empty because this is the only thread
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//that submits data
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if (g_VideoInitialize.bOnThread)
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{
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// Force complete fifo flush if we attempt to set/reset the fifo (API GXSetGPFifo or equivalent)
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// It's kind of an API hack but it works for lots of games... and I hope it's the same way for every games.
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// TODO: HLE for GX fifo's APIs?
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// Here is the hack:
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// - if (attempt to overwrite CTRL_REGISTER by 0x0000)
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// // then we assume CPReadWriteDistance will be overwrited very soon.
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// - if (fifo is not empty)
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// // (not 100% sure): shouln't happen unless PPC think having trouble with the sync
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// // and it attempt a fifo recovery (look for PI_FIFO_RESET in log).
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// // If we want to emulate self fifo recovery we need proper GX metrics emulation... yeah sure :p
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// - spin until fifo is empty
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// - else
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// - normal write16
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if (((_Address&0xFFF) == CTRL_REGISTER) && (_Value == 0)) // API hack
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{
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// weird MP1 redo that right after linking fifo with GP... hmmm
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/*_dbg_assert_msg_(COMMANDPROCESSOR, fifo.CPReadWriteDistance == 0,
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"WTF! Something went wrong with GP/PPC the sync! -> CPReadWriteDistance: 0x%08X\n"
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" - The fifo is not empty but we are going to lock it anyway.\n"
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" - \"Normaly\", this is due to fifo-hang-so-lets-attempt-recovery.\n"
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" - The bad news is dolphin don't support special recovery features like GXfifo's metric yet.\n"
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" - The good news is, the time you read that message, the fifo should be empty now :p\n"
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" - Anyway, fifo flush will be forced if you press OK and dolphin might continue to work...\n"
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" - We aren't betting on that :)", fifo.CPReadWriteDistance);
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*/
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DEBUG_LOG(COMMANDPROCESSOR, "*********************** GXSetGPFifo very soon? ***********************");
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// (mb2) We don't sleep here since it could be a perf issue for super monkey ball (yup only this game IIRC)
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// Touching that game is a no-go so I don't want to take the risk :p
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while (fifo.bFF_GPReadEnable && fifo.CPReadWriteDistance && !fifo.bFF_Breakpoint)
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s_fifoIdleEvent.MsgWait();
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}
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}
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switch (_Address & 0xFFF)
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{
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case STATUS_REGISTER:
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{
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// This should be Read-Only
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ERROR_LOG(COMMANDPROCESSOR,"\t write to STATUS_REGISTER : %04x", _Value);
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PanicAlert("CommandProcessor:: CPU writes to STATUS_REGISTER!");
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}
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break;
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case CTRL_REGISTER:
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{
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UCPCtrlReg tmpCtrl(_Value);
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m_CPCtrlReg.Hex = tmpCtrl.Hex;
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Common::AtomicStore(fifo.bFF_GPLinkEnable, tmpCtrl.GPLinkEnable);
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Common::AtomicStore(fifo.bFF_GPReadEnable, tmpCtrl.GPReadEnable);
|
|
Common::AtomicStore(fifo.bFF_BPEnable, tmpCtrl.BPEnable);
|
|
|
|
if (tmpCtrl.BPInit && tmpCtrl.BPEnable && tmpCtrl.GPReadEnable)
|
|
{
|
|
// Clear old BP and initiate new BP
|
|
Common::AtomicStore(fifo.bFF_Breakpoint, 0);
|
|
}
|
|
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to CTRL_REGISTER : %04x", _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR, "\t GPREAD %s | LINK %s | BP %s || Init %s | OvF %s | UndF %s"
|
|
, fifo.bFF_GPReadEnable ? "ON" : "OFF"
|
|
, fifo.bFF_GPLinkEnable ? "ON" : "OFF"
|
|
, fifo.bFF_BPEnable ? "ON" : "OFF"
|
|
, m_CPCtrlReg.BPInit ? "ON" : "OFF"
|
|
, m_CPCtrlReg.FifoOverflowIntEnable ? "ON" : "OFF"
|
|
, m_CPCtrlReg.FifoUnderflowIntEnable ? "ON" : "OFF"
|
|
);
|
|
}
|
|
break;
|
|
|
|
case PERF_SELECT:
|
|
// Seems to select which set of perf registers should be exposed.
|
|
DEBUG_LOG(COMMANDPROCESSOR, "write to PERF_SELECT: %04x", _Value);
|
|
break;
|
|
|
|
case CLEAR_REGISTER:
|
|
// We don't care since we don't implement Watermark
|
|
//m_CPClearReg.Hex = 0;
|
|
//m_CPStatusReg.OverflowHiWatermark = 0;
|
|
//m_CPStatusReg.UnderflowHiWatermark = 0;
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to CLEAR_REGISTER : %04x", _Value);
|
|
break;
|
|
|
|
// Fifo Registers
|
|
case FIFO_TOKEN_REGISTER:
|
|
m_tokenReg = _Value;
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_TOKEN_REGISTER : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_BASE_LO:
|
|
bUpdate = true;
|
|
WriteLow ((u32 &)fifo.CPBase, _Value & 0xFFE0);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_BASE_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_BASE_HI:
|
|
bUpdate = true;
|
|
WriteHigh((u32 &)fifo.CPBase, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_BASE_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_END_LO:
|
|
bUpdate = true;
|
|
// Somtimes this value is not aligned with 32B, e.g. New Super Mario Bros. Wii
|
|
WriteLow ((u32 &)fifo.CPEnd, _Value & 0xFFE0);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_END_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_END_HI:
|
|
bUpdate = true;
|
|
WriteHigh((u32 &)fifo.CPEnd, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_END_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_WRITE_POINTER_LO:
|
|
bUpdate = true;
|
|
WriteLow ((u32 &)fifo.CPWritePointer, _Value & 0xFFE0);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_WRITE_POINTER_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_WRITE_POINTER_HI:
|
|
bUpdate = true;
|
|
WriteHigh((u32 &)fifo.CPWritePointer, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_WRITE_POINTER_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_READ_POINTER_LO:
|
|
bUpdate = true;
|
|
WriteLow ((u32 &)fifo.CPReadPointer, _Value & 0xFFE0);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_READ_POINTER_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_READ_POINTER_HI:
|
|
bUpdate = true;
|
|
WriteHigh((u32 &)fifo.CPReadPointer, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_READ_POINTER_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_HI_WATERMARK_LO:
|
|
WriteLow ((u32 &)fifo.CPHiWatermark, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_HI_WATERMARK_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_HI_WATERMARK_HI:
|
|
WriteHigh((u32 &)fifo.CPHiWatermark, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_HI_WATERMARK_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_LO_WATERMARK_LO:
|
|
WriteLow ((u32 &)fifo.CPLoWatermark, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_LO_WATERMARK_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_LO_WATERMARK_HI:
|
|
WriteHigh((u32 &)fifo.CPLoWatermark, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_LO_WATERMARK_HI : %04x", _Value);
|
|
break;
|
|
|
|
case FIFO_BP_LO:
|
|
WriteLow ((u32 &)fifo.CPBreakpoint, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"write to FIFO_BP_LO : %04x", _Value);
|
|
break;
|
|
case FIFO_BP_HI:
|
|
WriteHigh((u32 &)fifo.CPBreakpoint, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"write to FIFO_BP_HI : %04x", _Value);
|
|
break;
|
|
|
|
// Super monkey try to overwrite CPReadWriteDistance by an old saved RWD value. Which is lame for us.
|
|
// hack: We have to force CPU to think fifo is alway empty and on idle.
|
|
// When we fall here CPReadWriteDistance should be always null and the game should always want to overwrite it by 0.
|
|
// So, we can skip it.
|
|
case FIFO_RW_DISTANCE_HI:
|
|
//WriteHigh((u32 &)fifo.CPReadWriteDistance, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"try to write to FIFO_RW_DISTANCE_HI : %04x", _Value);
|
|
break;
|
|
case FIFO_RW_DISTANCE_LO:
|
|
//WriteLow((u32 &)fifo.CPReadWriteDistance, _Value);
|
|
DEBUG_LOG(COMMANDPROCESSOR,"try to write to FIFO_RW_DISTANCE_LO : %04x", _Value);
|
|
break;
|
|
|
|
default:
|
|
WARN_LOG(COMMANDPROCESSOR, "(w16) unknown CP reg write %04x @ %08x", _Value, _Address);
|
|
}
|
|
|
|
if (bUpdate || !g_VideoInitialize.bOnThread) // TOCHECK(mb2): check again if thread safe?
|
|
{
|
|
if (g_VideoInitialize.bOnThread) FifoCriticalEnter(); // This may not be necessary, just for safety
|
|
UpdateFifoRegister();
|
|
if (g_VideoInitialize.bOnThread) FifoCriticalLeave();
|
|
}
|
|
}
|
|
|
|
void Read32(u32& _rReturnValue, const u32 _Address)
|
|
{
|
|
_rReturnValue = 0;
|
|
_dbg_assert_msg_(COMMANDPROCESSOR, 0, "Read32 from CommandProccessor at 0x%08x", _Address);
|
|
}
|
|
|
|
void Write32(const u32 _Data, const u32 _Address)
|
|
{
|
|
_dbg_assert_msg_(COMMANDPROCESSOR, 0, "Write32 at CommandProccessor at 0x%08x", _Address);
|
|
}
|
|
|
|
// for GP watchdog hack
|
|
void IncrementGPWDToken()
|
|
{
|
|
Common::AtomicIncrement(fifo.Fake_GPWDToken);
|
|
}
|
|
|
|
bool AllowIdleSkipping()
|
|
{
|
|
return !g_VideoInitialize.bOnThread || !m_CPCtrlReg.BPEnable;
|
|
}
|
|
|
|
// Check every FAKE_GP_WATCHDOG_PERIOD if a PE-frame-finish occured
|
|
// if not then lock CPUThread until GP finish a frame.
|
|
void WaitForFrameFinish()
|
|
{
|
|
while ((fake_GPWatchdogLastToken == fifo.Fake_GPWDToken) && fifo.bFF_GPReadEnable && ((!fifo.bFF_BPEnable && fifo.CPReadWriteDistance) || (fifo.bFF_BPEnable && !fifo.bFF_Breakpoint)));
|
|
s_fifoIdleEvent.MsgWait();
|
|
|
|
fake_GPWatchdogLastToken = fifo.Fake_GPWDToken;
|
|
}
|
|
|
|
void STACKALIGN GatherPipeBursted()
|
|
{
|
|
// if we aren't linked, we don't care about gather pipe data
|
|
if (!fifo.bFF_GPLinkEnable)
|
|
return;
|
|
|
|
if (g_VideoInitialize.bOnThread)
|
|
{
|
|
// update the fifo-pointer
|
|
if (fifo.CPWritePointer >= fifo.CPEnd)
|
|
fifo.CPWritePointer = fifo.CPBase;
|
|
else
|
|
fifo.CPWritePointer += GATHER_PIPE_SIZE;
|
|
|
|
Common::AtomicAdd(fifo.CPReadWriteDistance, GATHER_PIPE_SIZE);
|
|
|
|
// High watermark overflow handling (hacked way)
|
|
if (fifo.CPReadWriteDistance > fifo.CPHiWatermark)
|
|
{
|
|
// we should raise an Ov interrupt for an accurate fifo emulation and let PPC deal with it.
|
|
// But it slowdowns things because of if(interrupt blah blah){} blocks for each 32B fifo transactions.
|
|
// CPU would be a bit more loaded too by its interrupt handling...
|
|
// Eather way, CPU would have the ability to resume another thread.
|
|
// To be clear: this spin loop is like a critical section spin loop in the emulated GX thread hence "hacked way"
|
|
|
|
// Yes, in real life, the only purpose of the low watermark interrupt is just for cooling down OV contention.
|
|
// - @ game start -> watermark init: Overflow enabled, Underflow disabled
|
|
// - if (OV is raised)
|
|
// - CPU stop to write to fifo
|
|
// - enable Underflow interrupt (this only happens if OV is raised)
|
|
// - do other things
|
|
// - if (Underflow is raised (implicite: AND if an OV has been raised))
|
|
// - CPU can write to fifo
|
|
// - disable Underflow interrupt
|
|
|
|
INFO_LOG(COMMANDPROCESSOR, "(GatherPipeBursted): CPHiWatermark (Hi: 0x%04x, Lo: 0x%04x) reached (RWDistance: 0x%04x)", fifo.CPHiWatermark, fifo.CPLoWatermark, fifo.CPReadWriteDistance);
|
|
// Wait for GPU to catch up
|
|
while (fifo.CPReadWriteDistance > fifo.CPLoWatermark && !fifo.bFF_Breakpoint)
|
|
s_fifoIdleEvent.MsgWait();
|
|
}
|
|
// check if we are in sync
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPWritePointer == *(g_VideoInitialize.Fifo_CPUWritePointer), "FIFOs linked but out of sync");
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPBase == *(g_VideoInitialize.Fifo_CPUBase), "FIFOs linked but out of sync");
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPEnd == *(g_VideoInitialize.Fifo_CPUEnd), "FIFOs linked but out of sync");
|
|
}
|
|
else
|
|
{
|
|
if (fifo.CPWritePointer >= fifo.CPEnd)
|
|
fifo.CPWritePointer = fifo.CPBase;
|
|
else
|
|
fifo.CPWritePointer += GATHER_PIPE_SIZE;
|
|
// check if we are in sync
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPWritePointer == *(g_VideoInitialize.Fifo_CPUWritePointer), "FIFOs linked but out of sync");
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPBase == *(g_VideoInitialize.Fifo_CPUBase), "FIFOs linked but out of sync");
|
|
_assert_msg_(COMMANDPROCESSOR, fifo.CPEnd == *(g_VideoInitialize.Fifo_CPUEnd), "FIFOs linked but out of sync");
|
|
|
|
UpdateFifoRegister();
|
|
}
|
|
}
|
|
|
|
// This is only used in single core mode
|
|
void CatchUpGPU()
|
|
{
|
|
// check if we are able to run this buffer
|
|
if (fifo.bFF_GPReadEnable && !(fifo.bFF_BPEnable && fifo.bFF_Breakpoint))
|
|
{
|
|
// HyperIris: Memory_GetPtr is an expensive call, call it less, run faster
|
|
u8 *ptr = Memory_GetPtr(fifo.CPReadPointer);
|
|
|
|
// Sometimes we have already exceeded the BP even before it is set
|
|
// so careful check is required
|
|
while (fifo.CPReadWriteDistance || (fifo.bFF_BPEnable && !fifo.bFF_Breakpoint))
|
|
{
|
|
// check if we are on a breakpoint
|
|
if (fifo.bFF_BPEnable)
|
|
{
|
|
if (
|
|
(fifo.CPReadPointer == fifo.CPBreakpoint) ||
|
|
(fifo.CPReadPointer == fifo.CPWritePointer) ||
|
|
(fifo.CPReadPointer > fifo.CPBreakpoint && fifo.CPBreakpoint > fifo.CPWritePointer)
|
|
)
|
|
{
|
|
//_assert_msg_(POWERPC,0,"BP: %08x",fifo.CPBreakpoint);
|
|
fifo.bFF_Breakpoint = 1;
|
|
UpdateInterrupts(true);
|
|
break;
|
|
}
|
|
}
|
|
|
|
// read the data and send it to the VideoPlugin
|
|
// We are going to do FP math on the main thread so have to save the current state
|
|
SaveSSEState();
|
|
LoadDefaultSSEState();
|
|
Fifo_SendFifoData(ptr,32);
|
|
LoadSSEState();
|
|
|
|
fifo.CPReadWriteDistance -= 32;
|
|
// increase the ReadPtr
|
|
if (fifo.CPReadPointer >= fifo.CPEnd)
|
|
{
|
|
fifo.CPReadPointer = fifo.CPBase;
|
|
// adjust, take care
|
|
ptr = Memory_GetPtr(fifo.CPReadPointer);
|
|
DEBUG_LOG(COMMANDPROCESSOR, "Fifo Loop");
|
|
}
|
|
else
|
|
{
|
|
fifo.CPReadPointer += 32;
|
|
ptr += 32;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// __________________________________________________________________________________________________
|
|
// !!! Temporary (I hope): re-used in DC mode
|
|
// UpdateFifoRegister
|
|
// It's no problem if the gfx falls behind a little bit. Better make sure to stop the cpu thread
|
|
// when the distance is way huge, though.
|
|
// So:
|
|
// CPU thread
|
|
/// 0. Write data (done before entering this)
|
|
// 1. Compute distance
|
|
// 2. If distance > threshold, sleep and goto 1
|
|
// GPU thread
|
|
// 1. Compute distance
|
|
// 2. If distance < threshold, sleep and goto 1 (or wait for trigger?)
|
|
// 3. Read and use a bit of data, goto 1
|
|
void UpdateFifoRegister()
|
|
{
|
|
// update the distance
|
|
int wp = fifo.CPWritePointer;
|
|
int rp = fifo.CPReadPointer;
|
|
int dist;
|
|
if (wp >= rp)
|
|
dist = wp - rp;
|
|
else
|
|
dist = (wp - fifo.CPBase) + ((fifo.CPEnd + GATHER_PIPE_SIZE) - rp);
|
|
|
|
Common::AtomicStore(fifo.CPReadWriteDistance, dist);
|
|
|
|
if (!g_VideoInitialize.bOnThread)
|
|
CatchUpGPU();
|
|
}
|
|
|
|
void UpdateInterrupts(bool active)
|
|
{
|
|
DEBUG_LOG(COMMANDPROCESSOR, "Fifo Breakpoint Interrupt: %s", (active)? "Asserted" : "Deasserted");
|
|
g_VideoInitialize.pSetInterrupt(INT_CAUSE_CP, active);
|
|
}
|
|
|
|
void UpdateInterruptsFromVideoPlugin(bool active)
|
|
{
|
|
g_VideoInitialize.pScheduleEvent_Threadsafe(0, et_UpdateInterrupts, active);
|
|
}
|
|
|
|
void SetFifoIdleFromVideoPlugin()
|
|
{
|
|
s_fifoIdleEvent.Set();
|
|
}
|
|
|
|
} // end of namespace CommandProcessor
|