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esp-idf/examples/system/ulp_riscv/ds18b20_onewire/sdkconfig.defaults

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example ulp_riscv: Set IDF_TARGET to esp32s2
2020-12-22 19:53:53 +11:00
CONFIG_IDF_TARGET="esp32s2"
ulp: added support to building code for riscv ULP coprocessor
2020-04-17 16:34:56 -03:00
# Enable ULP
ulp: refactor ulp component This commit refactors the ulp component. Files are now divided based on type of ulp, viz., fsm or risc-v. Files common to both are maintained in the ulp_common folder. This commit also adds menuconfig options for ULP within the ulp component instead of presenting target specific configuations for ulp.
2022-01-21 14:43:48 +05:30
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
ulp: added support to building code for riscv ULP coprocessor
2020-04-17 16:34:56 -03:00
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_BOOTLOADER_LOG_LEVEL=2
CONFIG_LOG_DEFAULT_LEVEL_WARN=y
Whitespace: Automated whitespace fixes (large commit) Apply the pre-commit hook whitespace fixes to all files in the repo. (Line endings, blank lines at end of file, trailing whitespace)
2020-11-10 18:40:01 +11:00
CONFIG_LOG_DEFAULT_LEVEL=2
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