diff --git a/docs/en/api-reference/storage/spi_flash_concurrency.rst b/docs/en/api-reference/storage/spi_flash_concurrency.rst
index 4b85e0e30c..cc746debc1 100644
--- a/docs/en/api-reference/storage/spi_flash_concurrency.rst
+++ b/docs/en/api-reference/storage/spi_flash_concurrency.rst
@@ -11,7 +11,7 @@ The SPI0/1 bus is shared between the instruction & data cache (for firmware exec
 
 .. only:: esp32c3
 
-    On {IDF_TARGET_NAME}, the config option :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND` (enabled by default) allows the cache to read flash concurrently with SPI1 operations. See :ref:`auto-suspend` for more details.
+    On {IDF_TARGET_NAME}, the config option :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND` allows the cache to read flash concurrently with SPI1 operations. This is an optional feature that depends on special SPI Flash models, hence disabled by default. See :ref:`auto-suspend` for more details.
 
     If this option is disabled, the caches must be disabled while reading/writing/erasing operations. There are some constraints using driver on the SPI1 bus, see :ref:`impact_disabled_cache`. This constraints will cause more IRAM/DRAM usages.
 
diff --git a/docs/zh_CN/api-reference/storage/spi_flash_concurrency.rst b/docs/zh_CN/api-reference/storage/spi_flash_concurrency.rst
index 086ee3a39c..921c4a4fca 100644
--- a/docs/zh_CN/api-reference/storage/spi_flash_concurrency.rst
+++ b/docs/zh_CN/api-reference/storage/spi_flash_concurrency.rst
@@ -11,7 +11,7 @@ SPI1 Flash 并发约束
 
 .. only:: esp32c3
 
-    在 {IDF_TARGET_NAME} 上，默认启用的配置选项 :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND` 允许 flash/PSRAM 的 cache 访问和 SPI1 的操作存并发地执行。请参阅 :ref:`auto-suspend`，查看详细信息。
+    在 {IDF_TARGET_NAME} 上，配置选项 :ref:`CONFIG_SPI_FLASH_AUTO_SUSPEND` 允许 Flash 的 cache 访问和 SPI1 的操作存并发地执行。该选项是可选的，依赖于特定的 SPI Flash 型号，因此默认是关闭的。请参阅 :ref:`auto-suspend`，查看详细信息。
 
     在该选项被禁用的情况下，读取/写入/擦除 flash 时，cache 必须被禁用。使用驱动访问 SPI1 的相关约束参见 :ref:`impact_disabled_cache`。这些约束会带来更多的 IRAM/DRAM 消耗。