From 01cc5a38cc410af3f321a8e27dfccd9e4f93381d Mon Sep 17 00:00:00 2001
From: morris <maoshengrong@espressif.com>
Date: Tue, 21 Jan 2020 21:30:18 +0800
Subject: [PATCH] ethernet: work with cache disabled

---
 components/esp_eth/include/esp_eth_mac.h   |  5 ++++-
 components/esp_eth/src/esp_eth_mac_esp32.c | 19 +++++++++++++++----
 2 files changed, 19 insertions(+), 5 deletions(-)

diff --git a/components/esp_eth/include/esp_eth_mac.h b/components/esp_eth/include/esp_eth_mac.h
index 7b4cff2fc5..9ff8aa6f23 100644
--- a/components/esp_eth/include/esp_eth_mac.h
+++ b/components/esp_eth/include/esp_eth_mac.h
@@ -24,7 +24,6 @@ extern "C" {
 #include "driver/spi_master.h"
 #endif
 
-
 /**
 * @brief Ethernet MAC
 *
@@ -248,8 +247,11 @@ typedef struct {
     uint32_t rx_task_prio;        /*!< Priority of the receive task */
     int smi_mdc_gpio_num;         /*!< SMI MDC GPIO number */
     int smi_mdio_gpio_num;        /*!< SMI MDIO GPIO number */
+    uint32_t flags;               /*!< Flags that specify extra capability for mac driver */
 } eth_mac_config_t;
 
+#define ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE (1 << 0) /*!< MAC driver can work when cache is disabled */
+
 /**
  * @brief Default configuration for Ethernet MAC object
  *
@@ -261,6 +263,7 @@ typedef struct {
         .rx_task_prio = 15,         \
         .smi_mdc_gpio_num = 23,     \
         .smi_mdio_gpio_num = 18,    \
+        .flags = 0,                 \
     }
 
 #if CONFIG_ETH_USE_ESP32_EMAC
diff --git a/components/esp_eth/src/esp_eth_mac_esp32.c b/components/esp_eth/src/esp_eth_mac_esp32.c
index 6f79413845..b1d28e0e53 100644
--- a/components/esp_eth/src/esp_eth_mac_esp32.c
+++ b/components/esp_eth/src/esp_eth_mac_esp32.c
@@ -358,6 +358,7 @@ static esp_err_t emac_esp32_del(esp_eth_mac_t *mac)
     return ESP_OK;
 }
 
+// To achieve a better performance, we put the ISR always in IRAM
 IRAM_ATTR void emac_esp32_isr_handler(void *args)
 {
     emac_hal_context_t *hal = (emac_hal_context_t *)args;
@@ -371,11 +372,16 @@ IRAM_ATTR void emac_esp32_isr_handler(void *args)
 
 esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
 {
+    esp_err_t ret_code = ESP_OK;
     esp_eth_mac_t *ret = NULL;
     void *descriptors = NULL;
     emac_esp32_t *emac = NULL;
     MAC_CHECK(config, "can't set mac config to null", err, NULL);
-    emac = calloc(1, sizeof(emac_esp32_t));
+    if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
+        emac = heap_caps_calloc(1, sizeof(emac_esp32_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
+    } else {
+        emac = calloc(1, sizeof(emac_esp32_t));
+    }
     MAC_CHECK(emac, "calloc emac failed", err, NULL);
     /* alloc memory for ethernet dma descriptor */
     uint32_t desc_size = CONFIG_ETH_DMA_RX_BUFFER_NUM * sizeof(eth_dma_rx_descriptor_t) +
@@ -416,9 +422,14 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config)
     emac->parent.transmit = emac_esp32_transmit;
     emac->parent.receive = emac_esp32_receive;
     /* Interrupt configuration */
-    MAC_CHECK(esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_esp32_isr_handler,
-                             &emac->hal, &(emac->intr_hdl)) == ESP_OK,
-              "alloc emac interrupt failed", err, NULL);
+    if (config->flags & ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE) {
+        ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM,
+                                  emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
+    } else {
+        ret_code = esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, 0,
+                                  emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl));
+    }
+    MAC_CHECK(ret_code == ESP_OK, "alloc emac interrupt failed", err, NULL);
 #ifdef CONFIG_PM_ENABLE
     MAC_CHECK(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "emac_esp32", &emac->pm_lock) == ESP_OK,
               "create pm lock failed", err, NULL);