From b887f86a78f16763b7ddc76bcbf6c55b1fd6d18e Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 15 Dec 2022 17:14:52 +0800 Subject: [PATCH 1/3] soc: add SOC_IEEE802154_SUPPORTED caps --- components/soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c6/include/soc/soc_caps.h | 1 + components/soc/esp32h2/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32h2/include/soc/soc_caps.h | 1 + components/soc/esp32h4/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32h4/include/soc/soc_caps.h | 1 + 6 files changed, 15 insertions(+) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index fe7ac2e40b..7ce2197c63 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -31,6 +31,10 @@ config SOC_BT_SUPPORTED bool default y +config SOC_IEEE802154_SUPPORTED + bool + default y + config SOC_ASYNC_MEMCPY_SUPPORTED bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 7a5d4894a6..665bccb4a1 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -33,6 +33,7 @@ #define SOC_TWAI_SUPPORTED 1 #define SOC_ETM_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 +#define SOC_IEEE802154_SUPPORTED 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 #define SOC_TEMP_SENSOR_SUPPORTED 1 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 4c0055250c..ada7dbe89e 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -3,6 +3,10 @@ # using gen_soc_caps_kconfig.py, do not edit manually ##################################################### +config SOC_IEEE802154_SUPPORTED + bool + default y + config SOC_EFUSE_KEY_PURPOSE_FIELD bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 17bdfca5a5..683ea34b28 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -32,6 +32,7 @@ // #define SOC_MCPWM_SUPPORTED 1 // TODO: IDF-6237 // #define SOC_TWAI_SUPPORTED 1 // TODO: IDF-6217 // #define SOC_BT_SUPPORTED 1 // TODO: IDF-6416 +#define SOC_IEEE802154_SUPPORTED 1 // #define SOC_ASYNC_MEMCPY_SUPPORTED 1 // TODO: IDF-6238 // #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 // TODO: IDF-6239 // #define SOC_TEMP_SENSOR_SUPPORTED 1 // TODO: IDF-6229 diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in index bd2e0674cc..98a04311cc 100644 --- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in @@ -23,6 +23,10 @@ config SOC_BT_SUPPORTED bool default y +config SOC_IEEE802154_SUPPORTED + bool + default y + config SOC_ASYNC_MEMCPY_SUPPORTED bool default y diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h index c209d12f58..fa00cb54bc 100644 --- a/components/soc/esp32h4/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -38,6 +38,7 @@ #define SOC_GDMA_SUPPORTED 1 #define SOC_TWAI_SUPPORTED 1 #define SOC_BT_SUPPORTED 1 +#define SOC_IEEE802154_SUPPORTED 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 #define SOC_SUPPORTS_SECURE_DL_MODE 1 From 5822cdf93b93b22d7b349e8363246ab6b104179e Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 13 Dec 2022 14:04:50 +0800 Subject: [PATCH 2/3] esp_phy: enable for esp32c6 --- components/esp_phy/CMakeLists.txt | 12 +- .../esp_phy/esp32c6/include/phy_init_data.h | 184 ++++++++++++++++++ .../esp32c6/phy_multiple_init_data.bin | Bin 0 -> 1072 bytes components/esp_phy/lib | 2 +- components/esp_phy/src/phy_init.c | 16 +- .../port/soc/esp32c6/system_internal.c | 1 - components/soc/esp32c6/include/soc/soc_caps.h | 1 - components/soc/esp32h2/include/soc/soc_caps.h | 2 +- docs/conf_common.py | 5 +- docs/docs_not_updated/esp32c6.txt | 1 - docs/en/api-guides/index.rst | 2 +- docs/en/api-guides/partition-tables.rst | 2 +- docs/zh_CN/api-guides/index.rst | 2 +- tools/ci/check_public_headers_exceptions.txt | 1 + 14 files changed, 209 insertions(+), 22 deletions(-) create mode 100644 components/esp_phy/esp32c6/include/phy_init_data.h create mode 100644 components/esp_phy/esp32c6/phy_multiple_init_data.bin diff --git a/components/esp_phy/CMakeLists.txt b/components/esp_phy/CMakeLists.txt index 499caea25f..e9459c9a4b 100644 --- a/components/esp_phy/CMakeLists.txt +++ b/components/esp_phy/CMakeLists.txt @@ -1,7 +1,6 @@ idf_build_get_property(idf_target IDF_TARGET) -if(IDF_TARGET STREQUAL "esp32c6" OR IDF_TARGET STREQUAL "esp32h2") - # TODO : IDF-5680 +if(IDF_TARGET STREQUAL "esp32h2") # TODO : IDF-6337 return() endif() @@ -68,15 +67,10 @@ if(link_binary_libs) target_link_libraries(${COMPONENT_LIB} PUBLIC rtc) target_link_libraries(${COMPONENT_LIB} INTERFACE $ libphy.a librtc.a $) - endif() - - if(CONFIG_IDF_TARGET_ESP32S2) + elseif(CONFIG_IDF_TARGET_ESP32S2) target_link_libraries(${COMPONENT_LIB} INTERFACE $ libphy.a $) - endif() - - if(CONFIG_IDF_TARGET_ESP32C3 OR CONFIG_IDF_TARGET_ESP32S3 - OR CONFIG_IDF_TARGET_ESP32H4 OR CONFIG_IDF_TARGET_ESP32C2) + elseif(CONFIG_SOC_BT_SUPPORTED OR CONFIG_SOC_IEEE802154_SUPPORTED) target_link_libraries(${COMPONENT_LIB} PUBLIC btbb) target_link_libraries(${COMPONENT_LIB} INTERFACE $ libphy.a libbtbb.a $) diff --git a/components/esp_phy/esp32c6/include/phy_init_data.h b/components/esp_phy/esp32c6/include/phy_init_data.h new file mode 100644 index 0000000000..9f173ca95c --- /dev/null +++ b/components/esp_phy/esp32c6/include/phy_init_data.h @@ -0,0 +1,184 @@ +/* + * SPDX-FileCopyrightText: 2016-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef PHY_INIT_DATA_H +#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */ +#include "esp_phy_init.h" +#include "sdkconfig.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// constrain a value between 'low' and 'high', inclusive +#define LIMIT(val, low, high) ((val < low) ? low : (val > high) ? high : val) + +#define PHY_INIT_MAGIC "PHYINIT" + +// define the lowest tx power as LOWEST_PHY_TX_POWER +#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52) +#define PHY_TX_POWER_OFFSET 2 +#define PHY_TX_POWER_NUM 14 + +#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN +#define PHY_CRC_ALGORITHM 1 +#define PHY_COUNTRY_CODE_LEN 2 +#define PHY_INIT_DATA_TYPE_OFFSET 126 +#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125 +#endif + + +static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC; + +/** + * @brief Structure containing default recommended PHY initialization parameters. + */ +static const esp_phy_init_data_t phy_init_data= { { + 0x01, + 0x00, + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28), + 0x00, + 0x00, + 0x00, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0xff, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0x9B +} }; + +static const char __attribute__((section(".rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC; + +#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN +/** + * @brief PHY init data control infomation structure + */ +typedef struct { + uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */ + uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */ + uint8_t check_algorithm; /*!< check algorithm */ + uint8_t version; /*!< PHY init data bin version */ + uint8_t number; /*!< PHY init data bin number */ + uint8_t length[2]; /*!< Length of each PHY init data bin */ + uint8_t reserved[19]; /*!< 19-byte reserved */ +} __attribute__ ((packed)) phy_control_info_data_t; + +/** + * @brief Country corresponds to PHY init data type structure + */ +typedef struct { + char cc[PHY_COUNTRY_CODE_LEN]; + uint8_t type; +} phy_country_to_bin_type_t; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* PHY_INIT_DATA_H */ diff --git a/components/esp_phy/esp32c6/phy_multiple_init_data.bin b/components/esp_phy/esp32c6/phy_multiple_init_data.bin new file mode 100644 index 0000000000000000000000000000000000000000..0f754a2c496b5cf7b712c49b15e83a02082692f4 GIT binary patch literal 1072 zcmWIWi1hUH3}Ikk2nY!9@$vBS@Nn^Rb8}+&PdZ>A7cep`gSlh6%ptaIvLd;R4D1XI zSj|IsC!-rO`0s!WaPhDjOjwYSF%~nN7;SuDz{bYrzljG7n3$NL^ISl{#KeTKRajLp zGJVBnzYP-jj~p0oxOiAiCoIUwY>3T%nD>2X?tc~yEcPQuxC1U9gMtN-8VGw8s|rTe k1z79{#VH))wO Date: Fri, 16 Dec 2022 15:40:45 +0800 Subject: [PATCH 3/3] esp_phy: only esp32c3&esp32s3 support MAC_BB_PD, remove unused caps define --- components/soc/esp32c2/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32c2/include/soc/soc_caps.h | 1 - components/soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32c6/include/soc/soc_caps.h | 1 - components/soc/esp32h2/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32h2/include/soc/soc_caps.h | 1 - components/soc/esp32h4/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32h4/include/soc/soc_caps.h | 1 - 8 files changed, 20 deletions(-) diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index 8e0bd7f712..adcf5f6602 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -551,10 +551,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 -config SOC_MAC_BB_PD_MEM_SIZE - int - default 192 - config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH int default 12 diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 47a0d42bac..e588fb5f8e 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -268,7 +268,6 @@ /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) -#define SOC_MAC_BB_PD_MEM_SIZE (192*4) /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/ #define SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH (12) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 7ce2197c63..ee3f246389 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -859,10 +859,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 -config SOC_MAC_BB_PD_MEM_SIZE - int - default 192 - config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH int default 12 diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index 4d3754edbf..190f74a4ef 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -412,7 +412,6 @@ /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) -#define SOC_MAC_BB_PD_MEM_SIZE (192*4) // TODO: IDF-5679 (Copy from esp32c3, need check) /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/ diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index ada7dbe89e..361403d3d4 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -727,10 +727,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 -config SOC_MAC_BB_PD_MEM_SIZE - int - default 192 - config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH int default 12 diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 714ffcea5e..ff3e72dea6 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -402,7 +402,6 @@ // TODO: IDF-6337 /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) -#define SOC_MAC_BB_PD_MEM_SIZE (192*4) // TODO: IDF-5679 (Copy from esp32c6, need check) /*--------------- WIFI LIGHT SLEEP CLOCK WIDTH CAPS --------------------------*/ diff --git a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in index 98a04311cc..ad28130f48 100644 --- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in @@ -755,10 +755,6 @@ config SOC_PHY_DIG_REGS_MEM_SIZE int default 21 -config SOC_MAC_BB_PD_MEM_SIZE - int - default 192 - config SOC_PM_SUPPORT_BT_WAKEUP bool default y diff --git a/components/soc/esp32h4/include/soc/soc_caps.h b/components/soc/esp32h4/include/soc/soc_caps.h index fa00cb54bc..db7cf4ecea 100644 --- a/components/soc/esp32h4/include/soc/soc_caps.h +++ b/components/soc/esp32h4/include/soc/soc_caps.h @@ -359,7 +359,6 @@ /*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/ #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4) -#define SOC_MAC_BB_PD_MEM_SIZE (192*4) /*-------------------------- Power Management CAPS ----------------------------*/