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Merge branch 'bugfix/spi_reset_race' into 'master'

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periph_ctrl: Refactor to add periph_module_reset(), avoid potential race in SPI DMA workaround

See merge request !1349
This commit is contained in:
Angus Gratton
2017-10-13 08:51:36 +08:00
parent 5d8bd1aa9e 0dd9b899b7
commit 0a52dbccca
4 changed files with 190 additions and 228 deletions
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tools/unit-test-app/components/unity/ref_clock.c
+5 -8
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@@ -41,6 +41,7 @@
#include "driver/gpio.h"
#include "esp_intr_alloc.h"
#include "freertos/FreeRTOS.h"
#include "driver/periph_ctrl.h"
/* Select which RMT and PCNT channels, and GPIO to use */
#define REF_CLOCK_RMT_CHANNEL 7
@@ -64,8 +65,7 @@ void ref_clock_init()
// Initialize RMT
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_RMT_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_RMT_RST);
periph_module_enable(PERIPH_RMT_MODULE);
RMT.apb_conf.fifo_mask = 1;
rmt_item32_t data = {
.duration0 = 1,
@@ -101,8 +101,7 @@ void ref_clock_init()
}
// Initialize PCNT
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_PCNT_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_PCNT_RST);
periph_module_enable(PERIPH_PCNT_MODULE);
PCNT.conf_unit[REF_CLOCK_PCNT_UNIT].conf0.ch0_hctrl_mode = 0;
PCNT.conf_unit[REF_CLOCK_PCNT_UNIT].conf0.ch0_lctrl_mode = 0;
@@ -147,13 +146,11 @@ void ref_clock_deinit()
// Disable RMT
RMT.conf_ch[REF_CLOCK_RMT_CHANNEL].conf1.tx_start = 0;
RMT.conf_ch[REF_CLOCK_RMT_CHANNEL].conf0.clk_en = 0;
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_RMT_CLK_EN);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_RMT_RST);
periph_module_disable(PERIPH_RMT_MODULE);
// Disable PCNT
PCNT.ctrl.val |= ~(BIT(REF_CLOCK_PCNT_UNIT * 2 + 1));
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_PCNT_CLK_EN);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_PCNT_RST);
periph_module_disable(PERIPH_PCNT_MODULE);
}
uint64_t ref_clock_get()