From c68e4bbb6f7ab2a1e34491d1233c52e032092238 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 23 May 2023 16:11:26 +0800 Subject: [PATCH 1/2] adc: added a flag to replace internal pool data with newest data, when pool is full --- components/esp_adc/adc_continuous.c | 22 ++++++++++++++++++- components/esp_adc/adc_continuous_internal.h | 4 ++++ .../esp_adc/include/esp_adc/adc_continuous.h | 3 +++ .../peripherals/adc_continuous.rst | 1 + 4 files changed, 29 insertions(+), 1 deletion(-) diff --git a/components/esp_adc/adc_continuous.c b/components/esp_adc/adc_continuous.c index 6b08be7eae..0b16c50690 100644 --- a/components/esp_adc/adc_continuous.c +++ b/components/esp_adc/adc_continuous.c @@ -112,6 +112,7 @@ esp_err_t adc_continuous_new_handle(const adc_continuous_handle_cfg_t *hdl_confi } //ringbuffer storage/struct buffer + adc_ctx->ringbuf_size = hdl_config->max_store_buf_size; adc_ctx->ringbuf_storage = heap_caps_calloc(1, hdl_config->max_store_buf_size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); adc_ctx->ringbuf_struct = heap_caps_calloc(1, sizeof(StaticRingbuffer_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); if (!adc_ctx->ringbuf_storage || !adc_ctx->ringbuf_struct) { @@ -233,6 +234,7 @@ esp_err_t adc_continuous_new_handle(const adc_continuous_handle_cfg_t *hdl_confi }; adc_hal_dma_ctx_config(&adc_ctx->hal, &config); + adc_ctx->flags.flush_pool = hdl_config->flags.flush_pool; adc_ctx->fsm = ADC_FSM_INIT; *ret_handle = adc_ctx; @@ -312,7 +314,25 @@ static IRAM_ATTR bool s_adc_dma_intr(adc_continuous_ctx_t *adc_digi_ctx) } if (ret == pdFALSE) { - //ringbuffer overflow + if (adc_digi_ctx->flags.flush_pool) { + size_t actual_size = 0; + uint8_t *old_data = xRingbufferReceiveUpToFromISR(adc_digi_ctx->ringbuf_hdl, &actual_size, adc_digi_ctx->ringbuf_size); + /** + * Replace by ringbuffer reset API when this API is ready. + * Now we do mannual reset. + * For old_data == NULL condition (equals to the future ringbuffer reset fail condition), we don't care this time data, + * as this only happens when the ringbuffer size is small, new data will be filled in soon. + */ + if (old_data) { + vRingbufferReturnItemFromISR(adc_digi_ctx->ringbuf_hdl, old_data, &taskAwoken); + xRingbufferSendFromISR(adc_digi_ctx->ringbuf_hdl, finished_buffer, finished_size, &taskAwoken); + if (taskAwoken == pdTRUE) { + need_yield |= true; + } + } + } + + //ringbuffer overflow happens before if (adc_digi_ctx->cbs.on_pool_ovf) { adc_continuous_evt_data_t edata = {}; if (adc_digi_ctx->cbs.on_pool_ovf(adc_digi_ctx, &edata, adc_digi_ctx->user_data)) { diff --git a/components/esp_adc/adc_continuous_internal.h b/components/esp_adc/adc_continuous_internal.h index ab846f1285..3673cf6833 100644 --- a/components/esp_adc/adc_continuous_internal.h +++ b/components/esp_adc/adc_continuous_internal.h @@ -84,6 +84,7 @@ struct adc_continuous_ctx_t { RingbufHandle_t ringbuf_hdl; //RX ringbuffer handler void* ringbuf_storage; //Ringbuffer storage buffer void* ringbuf_struct; //Ringbuffer structure buffer + size_t ringbuf_size; //Ringbuffer size intptr_t rx_eof_desc_addr; //eof descriptor address of RX channel adc_fsm_t fsm; //ADC continuous mode driver internal states bool use_adc1; //1: ADC unit1 will be used; 0: ADC unit1 won't be used. @@ -94,6 +95,9 @@ struct adc_continuous_ctx_t { adc_continuous_evt_cbs_t cbs; //Callbacks void *user_data; //User context esp_pm_lock_handle_t pm_lock; //For power management + struct { + uint32_t flush_pool: 1; //Flush the internal pool when the pool is full. With this flag, the `on_pool_ovf` event will not happen. + } flags; #if SOC_ADC_DIG_IIR_FILTER_SUPPORTED adc_iir_filter_t *iir_filter[SOC_ADC_DIGI_IIR_FILTER_NUM]; //ADC IIR filter context #endif diff --git a/components/esp_adc/include/esp_adc/adc_continuous.h b/components/esp_adc/include/esp_adc/adc_continuous.h index d4827669e9..25fbdbb012 100644 --- a/components/esp_adc/include/esp_adc/adc_continuous.h +++ b/components/esp_adc/include/esp_adc/adc_continuous.h @@ -54,6 +54,9 @@ typedef struct adc_continuous_ctx_t *adc_continuous_handle_t; typedef struct { uint32_t max_store_buf_size; ///< Max length of the conversion Results that driver can store, in bytes. uint32_t conv_frame_size; ///< Conversion frame size, in bytes. This should be in multiples of `SOC_ADC_DIGI_DATA_BYTES_PER_CONV`. + struct { + uint32_t flush_pool: 1; ///< Flush the internal pool when the pool is full. + } flags; ///< Driver flags } adc_continuous_handle_cfg_t; /** diff --git a/docs/en/api-reference/peripherals/adc_continuous.rst b/docs/en/api-reference/peripherals/adc_continuous.rst index 416c47e181..e88a0f4c66 100644 --- a/docs/en/api-reference/peripherals/adc_continuous.rst +++ b/docs/en/api-reference/peripherals/adc_continuous.rst @@ -52,6 +52,7 @@ To create an ADC continuous mode driver handle, set up the required configuratio - :cpp:member:`adc_continuous_handle_cfg_t::max_store_buf_size` set the maximum size (in bytes) of the pool that the driver saves ADC conversion result into. If this pool is full, new conversion results will be lost. - :cpp:member:`adc_continuous_handle_cfg_t::conv_frame_size` set the size of the ADC conversion frame, in bytes. +- :cpp:member:`adc_continuous_handle_cfg_t::flags` set the flags that can change the driver behaviour. After setting up above configurations for the ADC, call :cpp:func:`adc_continuous_new_handle` with the prepared :cpp:type:`adc_continuous_handle_cfg_t`. This function may fail due to various errors such as invalid argumemts, insufficient memory, etc. From 56c66953dadca8cab44f608faf5b26e260921e68 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 23 May 2023 16:11:45 +0800 Subject: [PATCH 2/2] adc: added flush pool test --- .../test_apps/adc/main/test_adc_driver.c | 56 ++++++++++++++++++- .../test_apps/adc/main/test_adc_driver_iram.c | 2 +- 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/components/esp_adc/test_apps/adc/main/test_adc_driver.c b/components/esp_adc/test_apps/adc/main/test_adc_driver.c index e163fa0e83..04d5fb397b 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_driver.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_driver.c @@ -215,8 +215,62 @@ TEST_CASE("ADC continuous big conv_frame_size test", "[adc_continuous]") free(result); } + +#define ADC_FLUSH_TEST_SIZE 64 + +TEST_CASE("ADC continuous flush internal pool", "[adc_continuous][mannual][ignore]") +{ + adc_continuous_handle_t handle = NULL; + adc_continuous_handle_cfg_t adc_config = { + .max_store_buf_size = ADC_FLUSH_TEST_SIZE, + .conv_frame_size = ADC_FLUSH_TEST_SIZE, + .flags.flush_pool = true, + }; + TEST_ESP_OK(adc_continuous_new_handle(&adc_config, &handle)); + + adc_continuous_config_t dig_cfg = { + .sample_freq_hz = 50 * 1000, + .conv_mode = ADC_CONV_SINGLE_UNIT_1, + .format = ADC_DRIVER_TEST_OUTPUT_TYPE, + }; + adc_digi_pattern_config_t adc_pattern[SOC_ADC_PATT_LEN_MAX] = {0}; + adc_pattern[0].atten = ADC_ATTEN_DB_11; + adc_pattern[0].channel = ADC1_TEST_CHAN0; + adc_pattern[0].unit = ADC_UNIT_1; + adc_pattern[0].bit_width = SOC_ADC_DIGI_MAX_BITWIDTH; + dig_cfg.adc_pattern = adc_pattern; + dig_cfg.pattern_num = 1; + TEST_ESP_OK(adc_continuous_config(handle, &dig_cfg)); + + uint8_t result[ADC_FLUSH_TEST_SIZE] = {0}; + uint32_t ret_num = 0; + TEST_ESP_OK(adc_continuous_start(handle)); + + while (1) { + TEST_ESP_OK(adc_continuous_read(handle, result, ADC_FLUSH_TEST_SIZE, &ret_num, ADC_MAX_DELAY)); + printf("ret_num: 0d%"PRIu32" bytes\n", ret_num); + TEST_ASSERT(ret_num == ADC_FLUSH_TEST_SIZE); + + for (int i = 0; i < ret_num; i += SOC_ADC_DIGI_RESULT_BYTES) { + adc_digi_output_data_t *p = (void*)&result[i]; + #if (SOC_ADC_DIGI_RESULT_BYTES == 2) + printf("ADC1, Channel: %d, Value: %d\n", p->type1.channel, p->type1.data); + #else + printf("ADC1, Channel: %d, Value: %d\n", p->type2.channel, p->type2.data); + #endif + } + /** + * With this delay, check the read out data to be the newest data + */ + vTaskDelay(2000); + } + + TEST_ESP_OK(adc_continuous_stop(handle)); + TEST_ESP_OK(adc_continuous_deinit(handle)); +} + #if SOC_ADC_DIG_IIR_FILTER_SUPPORTED -TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]") +TEST_CASE("ADC filter exhausted allocation", "[adc_continuous]") { adc_continuous_handle_t handle = NULL; adc_continuous_handle_cfg_t adc_config = { diff --git a/components/esp_adc/test_apps/adc/main/test_adc_driver_iram.c b/components/esp_adc/test_apps/adc/main/test_adc_driver_iram.c index a258a5b743..1b800fbe44 100644 --- a/components/esp_adc/test_apps/adc/main/test_adc_driver_iram.c +++ b/components/esp_adc/test_apps/adc/main/test_adc_driver_iram.c @@ -185,7 +185,7 @@ static bool IRAM_ATTR NOINLINE_ATTR s_conv_done_cb(adc_continuous_handle_t handl return false; } -TEST_CASE("ADC continuous work with ISR and Flash", "[adc_oneshot]") +TEST_CASE("ADC continuous work with ISR and Flash", "[adc_continuous]") { adc_continuous_handle_t handle = NULL; adc_continuous_handle_cfg_t adc_config = {