From 04b2afed44e45fb0040c8009e4e2302ca9aa86bf Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Fri, 20 Sep 2024 17:26:31 +0800 Subject: [PATCH] change(esp_hw_support): switch lp_cpu power mode with clock src to save lp_cpu working power --- .../include/esp_private/esp_pmu.h | 1 + .../port/esp32/include/soc/rtc.h | 4 +- .../port/esp32c2/include/soc/rtc.h | 1 + .../port/esp32c3/include/soc/rtc.h | 1 + .../esp_hw_support/port/esp32c6/pmu_sleep.c | 34 ++++++++------ .../port/esp32c6/private_include/pmu_param.h | 4 +- .../esp_hw_support/port/esp32p4/pmu_sleep.c | 47 ++++++++----------- .../port/esp32p4/private_include/pmu_param.h | 4 +- .../port/esp32s2/include/soc/rtc.h | 3 +- .../port/esp32s3/include/soc/rtc.h | 1 + components/esp_hw_support/sleep_modes.c | 4 ++ components/esp_system/port/soc/esp32c5/clk.c | 2 + components/esp_system/port/soc/esp32p4/clk.c | 2 + 13 files changed, 58 insertions(+), 50 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 696415a795..5b48194607 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -49,6 +49,7 @@ typedef enum { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) #if SOC_PM_SUPPORT_EXT0_WAKEUP #define RTC_EXT0_TRIG_EN PMU_EXT0_WAKEUP_EN //!< EXT0 wakeup diff --git a/components/esp_hw_support/port/esp32/include/soc/rtc.h b/components/esp_hw_support/port/esp32/include/soc/rtc.h index dd0ad1873d..22f7cfe157 100644 --- a/components/esp_hw_support/port/esp32/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32/include/soc/rtc.h @@ -245,7 +245,7 @@ void rtc_clk_apll_enable(bool enable); * * @return * - 0 Failed - * - else Sucess + * - else Success */ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm0, uint32_t *_sdm1, uint32_t *_sdm2); @@ -517,7 +517,7 @@ typedef struct rtc_sleep_config_s { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature - +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) /** * Default initializer for rtc_sleep_config_t * diff --git a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h index 2cafa28399..9f8d412f59 100644 --- a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h @@ -562,6 +562,7 @@ typedef struct { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) /** * Default initializer for rtc_sleep_config_t diff --git a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h index 260df12930..58a26dd41e 100644 --- a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h @@ -608,6 +608,7 @@ typedef struct { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) /** * Default initializer for rtc_sleep_config_t diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c index a50e7bec68..0a801aefcf 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c @@ -192,41 +192,35 @@ static inline pmu_sleep_param_config_t * pmu_sleep_param_config_default( const pmu_sleep_config_t* pmu_sleep_config_default( pmu_sleep_config_t *config, - uint32_t pd_flags, + uint32_t sleep_flags, uint32_t adjustment, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp ) { - pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(pd_flags); - - uint32_t iram_pd_flags = 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G0) ? BIT(0) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G1) ? BIT(1) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G2) ? BIT(2) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G3) ? BIT(3) : 0; + pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(sleep_flags); config->power = power_default; - pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(pd_flags); - config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, pd_flags, adjustment, slowclk_period, fastclk_period); + pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(sleep_flags); + config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, sleep_flags, adjustment, slowclk_period, fastclk_period); if (dslp) { config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); - pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(sleep_flags); analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = get_dslp_dbg(); analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_dslp_lp_dbias(); config->analog = analog_default; } else { - pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(sleep_flags); config->digital = digital_default; - pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(sleep_flags); analog_default.hp_sys.analog.dbg_atten = get_lslp_dbg(); analog_default.hp_sys.analog.dbias = get_lslp_hp_dbias(); analog_default.lp_sys[LP(SLEEP)].analog.dbias = PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT; - if (!(pd_flags & PMU_SLEEP_PD_XTAL)){ + if (!(sleep_flags & PMU_SLEEP_PD_XTAL)){ analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; @@ -236,7 +230,7 @@ const pmu_sleep_config_t* pmu_sleep_config_default( analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); - } else if (!(pd_flags & PMU_SLEEP_PD_RC_FAST)) { + } else if (!(sleep_flags & PMU_SLEEP_PD_RC_FAST)) { analog_default.hp_sys.analog.dbias = get_act_hp_dbias(); analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_NODROP; analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); @@ -244,6 +238,16 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->analog = analog_default; } + + if (sleep_flags & RTC_SLEEP_XTAL_AS_RTC_FAST) { + // Keep XTAL on in HP_SLEEP state if it is the clock source of RTC_FAST + power_default.hp_sys.xtal.xpd_xtal = 1; + config->analog.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + config->analog.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; + config->analog.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; + config->analog.hp_sys.analog.dbias = get_act_hp_dbias(); + } + return config; } diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h index aad6f976ba..fdef78b330 100644 --- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h @@ -365,8 +365,8 @@ typedef struct { #define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \ .hp_sys = { \ .analog = { \ - .pd_cur = PMU_PD_CUR_SLEEP_ON, \ - .bias_sleep = PMU_BIASSLP_SLEEP_ON, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ .xpd = PMU_HP_XPD_DEEPSLEEP, \ .dbg_atten = PMU_DBG_HP_DEEPSLEEP \ } \ diff --git a/components/esp_hw_support/port/esp32p4/pmu_sleep.c b/components/esp_hw_support/port/esp32p4/pmu_sleep.c index b669091f52..97c112aa6b 100644 --- a/components/esp_hw_support/port/esp32p4/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32p4/pmu_sleep.c @@ -138,58 +138,44 @@ static inline pmu_sleep_param_config_t * pmu_sleep_param_config_default( const pmu_sleep_config_t* pmu_sleep_config_default( pmu_sleep_config_t *config, - uint32_t pd_flags, + uint32_t sleep_flags, uint32_t adjustment, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp ) { - pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(pd_flags); - - uint32_t iram_pd_flags = 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G0) ? BIT(0) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G1) ? BIT(1) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G2) ? BIT(2) : 0; - iram_pd_flags |= (pd_flags & PMU_SLEEP_PD_MEM_G3) ? BIT(3) : 0; + pmu_sleep_power_config_t power_default = PMU_SLEEP_POWER_CONFIG_DEFAULT(sleep_flags); if (dslp) { config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); - pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(sleep_flags); config->digital = digital_default; - pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags); -#if CONFIG_RTC_FAST_CLK_SRC_XTAL - analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; - analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; - analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; -#endif + pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(sleep_flags); config->analog = analog_default; } else { // Get light sleep digital_default - pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(sleep_flags); config->digital = digital_default; // Get light sleep analog default - pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags); + pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(sleep_flags); -#if !CONFIG_ESP_SLEEP_POWER_DOWN_FLASH +#if CONFIG_SPIRAM analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.lp_sys[PMU_MODE_LP_SLEEP].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; #endif -#if !CONFIG_RTC_FAST_CLK_SRC_XTAL - if (!(pd_flags & PMU_SLEEP_PD_XTAL)) -#endif + if (!(sleep_flags & PMU_SLEEP_PD_XTAL)) { // Analog parameters in HP_SLEEP analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; - } + analog_default.hp_sys.analog.dbias = HP_CALI_ACTIVE_DBIAS_DEFAULT; - if (!(pd_flags & PMU_SLEEP_PD_XTAL)) { // Analog parameters in LP_SLEEP analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; @@ -207,13 +193,18 @@ const pmu_sleep_config_t* pmu_sleep_config_default( config->analog = analog_default; } -#if CONFIG_RTC_FAST_CLK_SRC_XTAL - power_default.hp_sys.xtal.xpd_xtal = 1; -#endif + if (sleep_flags & RTC_SLEEP_XTAL_AS_RTC_FAST) { + // Keep XTAL on in HP_SLEEP state if it is the clock source of RTC_FAST + power_default.hp_sys.xtal.xpd_xtal = 1; + config->analog.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON; + config->analog.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; + config->analog.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; + config->analog.hp_sys.analog.dbias = HP_CALI_ACTIVE_DBIAS_DEFAULT; + } config->power = power_default; - pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(pd_flags); - config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, pd_flags, adjustment, slowclk_period, fastclk_period); + pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(sleep_flags); + config->param = *pmu_sleep_param_config_default(¶m_default, &power_default, sleep_flags, adjustment, slowclk_period, fastclk_period); return config; } diff --git a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h index bd44cb9d94..9c8be63ac5 100644 --- a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h @@ -382,8 +382,8 @@ typedef struct { #define PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags) { \ .hp_sys = { \ .analog = { \ - .pd_cur = PMU_PD_CUR_SLEEP_ON, \ - .bias_sleep = PMU_BIASSLP_SLEEP_ON, \ + .pd_cur = PMU_PD_CUR_SLEEP_DEFAULT, \ + .bias_sleep = PMU_BIASSLP_SLEEP_DEFAULT, \ .xpd = PMU_HP_XPD_DEEPSLEEP, \ .dbg_atten = PMU_DBG_HP_DEEPSLEEP \ } \ diff --git a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h index b37e98ec8f..5a3dda4844 100644 --- a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h @@ -331,7 +331,7 @@ void rtc_clk_apll_enable(bool enable); * * @return * - 0 Failed - * - else Sucess + * - else Success */ uint32_t rtc_clk_apll_coeff_calc(uint32_t freq, uint32_t *_o_div, uint32_t *_sdm0, uint32_t *_sdm1, uint32_t *_sdm2); @@ -633,6 +633,7 @@ typedef struct { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) /** * Default initializer for rtc_sleep_config_t diff --git a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h index 2790190aa0..27a4845f5f 100644 --- a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h @@ -619,6 +619,7 @@ typedef struct { #define RTC_SLEEP_DIG_USE_8M BIT(16) #define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17) #define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature +#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19) /** * Default initializer for rtc_sleep_config_t diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 484af78847..6a2d9a01ee 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -909,6 +909,10 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m sleep_flags |= RTC_SLEEP_NO_ULTRA_LOW; } + if (s_sleep_sub_mode_ref_cnt[ESP_SLEEP_RTC_FAST_USE_XTAL_MODE]) { + sleep_flags |= RTC_SLEEP_XTAL_AS_RTC_FAST; + } + #if CONFIG_ESP_SLEEP_DEBUG if (s_sleep_ctx != NULL) { s_sleep_ctx->sleep_flags = sleep_flags; diff --git a/components/esp_system/port/soc/esp32c5/clk.c b/components/esp_system/port/soc/esp32c5/clk.c index bf9e58487f..7bf484cab4 100644 --- a/components/esp_system/port/soc/esp32c5/clk.c +++ b/components/esp_system/port/soc/esp32c5/clk.c @@ -24,6 +24,7 @@ #if SOC_MODEM_CLOCK_SUPPORTED #include "hal/modem_lpcon_ll.h" #endif +#include "esp_private/esp_sleep_internal.h" #include "esp_private/esp_modem_clock.h" #include "esp_private/periph_ctrl.h" #include "esp_private/esp_clk.h" @@ -60,6 +61,7 @@ __attribute__((weak)) void esp_clk_init(void) rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_RC_FAST); #elif CONFIG_RTC_FAST_CLK_SRC_XTAL rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_XTAL); + esp_sleep_sub_mode_config(ESP_SLEEP_RTC_FAST_USE_XTAL_MODE, true); #else #error "No RTC fast clock source configured" #endif diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c index 4230946bed..fabbfe22ed 100644 --- a/components/esp_system/port/soc/esp32p4/clk.c +++ b/components/esp_system/port/soc/esp32p4/clk.c @@ -56,6 +56,7 @@ #include "hal/wdt_hal.h" #include "esp_private/esp_modem_clock.h" +#include "esp_private/esp_sleep_internal.h" #include "esp_private/periph_ctrl.h" #include "esp_private/esp_clk.h" #include "esp_private/esp_pmu.h" @@ -90,6 +91,7 @@ __attribute__((weak)) void esp_clk_init(void) rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_RC_FAST); #elif CONFIG_RTC_FAST_CLK_SRC_XTAL rtc_clk_fast_src_set(SOC_RTC_FAST_CLK_SRC_XTAL); + esp_sleep_sub_mode_config(ESP_SLEEP_RTC_FAST_USE_XTAL_MODE, true); #else #error "No RTC fast clock source configured" #endif