diff --git a/components/esp_hw_support/port/esp32/include/soc/rtc.h b/components/esp_hw_support/port/esp32/include/soc/rtc.h index f9548249d5..63a21678e0 100644 --- a/components/esp_hw_support/port/esp32/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -172,6 +172,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32/rtc_clk.c b/components/esp_hw_support/port/esp32/rtc_clk.c index 861dad33df..7646c98891 100644 --- a/components/esp_hw_support/port/esp32/rtc_clk.c +++ b/components/esp_hw_support/port/esp32/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -115,6 +115,11 @@ void rtc_clk_32k_enable_external(void) rtc_clk_32k_enable_common(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + clk_ll_xtal32k_disable(); +} + /* Helping external 32kHz crystal to start up. * External crystal connected to outputs GPIO32 GPIO33. * Forms N pulses with a frequency of about 32KHz on the outputs of the crystal. diff --git a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h index d1be8f7944..84837b4ebb 100644 --- a/components/esp_hw_support/port/esp32c2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c2/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -257,6 +257,11 @@ void rtc_clk_xtal_freq_update(soc_xtal_freq_t xtal_freq); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32KHz external oscillator + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Enable or disable 8 MHz internal oscillator * diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c index a36a186a23..40fd737c3f 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -37,6 +37,12 @@ void rtc_clk_32k_enable_external(void) REG_SET_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG); + REG_CLR_BIT(RTC_CNTL_PAD_HOLD_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); +} + void rtc_clk_8m_enable(bool clk_8m_en, bool d256_en) { if (clk_8m_en) { diff --git a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h index 6af1ece0ab..4d4faa581a 100644 --- a/components/esp_hw_support/port/esp32c3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c3/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -263,6 +263,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32c3/rtc_clk.c b/components/esp_hw_support/port/esp32c3/rtc_clk.c index 549e3c426c..ed9aaf2b1d 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c3/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,6 +56,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG); + CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_GPIO_PIN0_HOLD); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-C3, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32c5/include/soc/rtc.h b/components/esp_hw_support/port/esp32c5/include/soc/rtc.h index a11d201f20..59f9503e04 100644 --- a/components/esp_hw_support/port/esp32c5/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c5/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -181,6 +181,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32c5/rtc_clk.c b/components/esp_hw_support/port/esp32c5/rtc_clk.c index 31c1452130..341dc58ca6 100644 --- a/components/esp_hw_support/port/esp32c5/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c5/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -58,6 +58,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + gpio_ll_input_disable(&GPIO, EXT_OSC_SLOW_GPIO_NUM); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-C5, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h index ae0a4ea43b..0922620fac 100644 --- a/components/esp_hw_support/port/esp32c6/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c6/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -205,6 +205,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32c6/rtc_clk.c b/components/esp_hw_support/port/esp32c6/rtc_clk.c index 93aa57d940..1ddf54eda3 100644 --- a/components/esp_hw_support/port/esp32c6/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c6/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,6 +56,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-C6, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32c61/include/soc/rtc.h b/components/esp_hw_support/port/esp32c61/include/soc/rtc.h index b041327339..ae37654021 100644 --- a/components/esp_hw_support/port/esp32c61/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32c61/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -181,6 +181,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32c61/rtc_clk.c b/components/esp_hw_support/port/esp32c61/rtc_clk.c index 8a97e4d531..ab577f46b5 100644 --- a/components/esp_hw_support/port/esp32c61/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c61/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,6 +56,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + gpio_ll_input_disable(&GPIO, EXT_OSC_SLOW_GPIO_NUM); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-C61, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h index 9934431037..3f60822674 100644 --- a/components/esp_hw_support/port/esp32h2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32h2/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -207,6 +207,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32h2/rtc_clk.c b/components/esp_hw_support/port/esp32h2/rtc_clk.c index 305dec5b1e..0260707ec5 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32h2/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,6 +56,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO13_REG); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-H2, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32h21/include/soc/rtc.h b/components/esp_hw_support/port/esp32h21/include/soc/rtc.h index 51f3514652..a784293812 100644 --- a/components/esp_hw_support/port/esp32h21/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32h21/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -207,6 +207,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32h21/rtc_clk.c b/components/esp_hw_support/port/esp32h21/rtc_clk.c index fda52e20e2..2a4632e399 100644 --- a/components/esp_hw_support/port/esp32h21/rtc_clk.c +++ b/components/esp_hw_support/port/esp32h21/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,6 +56,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO13_REG); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-H2, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32h4/include/soc/rtc.h b/components/esp_hw_support/port/esp32h4/include/soc/rtc.h index f5f47a2aa8..30fb97e712 100644 --- a/components/esp_hw_support/port/esp32h4/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32h4/include/soc/rtc.h @@ -207,6 +207,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32h4/rtc_clk.c b/components/esp_hw_support/port/esp32h4/rtc_clk.c index c1099da1e3..3f65e49f4e 100644 --- a/components/esp_hw_support/port/esp32h4/rtc_clk.c +++ b/components/esp_hw_support/port/esp32h4/rtc_clk.c @@ -55,6 +55,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO0_REG); + REG_CLR_BIT(LP_AON_GPIO_HOLD0_REG, BIT(EXT_OSC_SLOW_GPIO_NUM)); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-H4, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h index cf9fb7c3de..fccfc2a030 100644 --- a/components/esp_hw_support/port/esp32s2/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s2/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -258,6 +258,11 @@ void rtc_clk_32k_enable(bool en); */ void rtc_clk_32k_enable_external(void); +/** + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + /** * @brief Get the state of 32k XTAL oscillator * @return true if 32k XTAL oscillator has been enabled diff --git a/components/esp_hw_support/port/esp32s2/rtc_clk.c b/components/esp_hw_support/port/esp32s2/rtc_clk.c index 07f8074f14..a284c043ba 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s2/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -49,6 +49,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32P_PAD_REG, RTC_IO_X32P_MUX_SEL); + CLEAR_PERI_REG_MASK(RTC_IO_XTAL_32N_PAD_REG, RTC_IO_X32N_MUX_SEL); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-S2, 'cycle' argument is to keep the signature diff --git a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h index 57de5e4716..dd3263bbd3 100644 --- a/components/esp_hw_support/port/esp32s3/include/soc/rtc.h +++ b/components/esp_hw_support/port/esp32s3/include/soc/rtc.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -276,7 +276,12 @@ void rtc_clk_32k_enable(bool en); void rtc_clk_32k_enable_external(void); /** - * @brief Get the state of 32k XTAL oscillator + * @brief Disable 32 kHz XTAL oscillator input. + */ +void rtc_clk_32k_disable_external(void); + +/** + * @brief Get the state of 32k XTAL oscillators * @return true if 32k XTAL oscillator has been enabled */ bool rtc_clk_32k_enabled(void); diff --git a/components/esp_hw_support/port/esp32s3/rtc_clk.c b/components/esp_hw_support/port/esp32s3/rtc_clk.c index 6f4f2ea352..22dbbafa49 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s3/rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -72,6 +72,13 @@ void rtc_clk_32k_enable_external(void) clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL); } +void rtc_clk_32k_disable_external(void) +{ + PIN_INPUT_DISABLE(IO_MUX_GPIO15_REG); + CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_X32P_HOLD); + clk_ll_xtal32k_disable(); +} + void rtc_clk_32k_bootstrap(uint32_t cycle) { /* No special bootstrapping needed for ESP32-S3, 'cycle' argument is to keep the signature diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c index c0e9454745..676eb6b03c 100644 --- a/components/esp_system/port/soc/esp32/clk.c +++ b/components/esp_system/port/soc/esp32/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -91,7 +91,13 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (slow_clk == SLOW_CLK_32K_XTAL) { + rtc_clk_32k_enable(false); + } else if (slow_clk == SLOW_CLK_32K_EXT_OSC) { + rtc_clk_32k_disable_external(); + } + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index 6cc267ea6c..824972f28c 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -180,7 +180,9 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index ecb5d08385..cc56b8abc1 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -176,7 +176,13 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (slow_clk == SLOW_CLK_32K_XTAL) { + rtc_clk_32k_enable(false); + } else if (slow_clk == SLOW_CLK_32K_EXT_OSC) { + rtc_clk_32k_disable_external(); + } + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32c5/clk.c b/components/esp_system/port/soc/esp32c5/clk.c index 77f43e6f27..c6175863c5 100644 --- a/components/esp_system/port/soc/esp32c5/clk.c +++ b/components/esp_system/port/soc/esp32c5/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -171,13 +171,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) } } rtc_clk_slow_src_set(rtc_slow_clk_src); - // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { rtc_clk_32k_enable(false); } - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c index 77a19472df..364567fead 100644 --- a/components/esp_system/port/soc/esp32c6/clk.c +++ b/components/esp_system/port/soc/esp32c6/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -185,12 +185,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_rc32k_enable(true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { rtc_clk_32k_enable(false); } + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { rtc_clk_rc32k_enable(false); } diff --git a/components/esp_system/port/soc/esp32c61/clk.c b/components/esp_system/port/soc/esp32c61/clk.c index d214167a55..2a91bcc2e9 100644 --- a/components/esp_system/port/soc/esp32c61/clk.c +++ b/components/esp_system/port/soc/esp32c61/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -148,13 +148,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) } } rtc_clk_slow_src_set(rtc_slow_clk_src); - // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { rtc_clk_32k_enable(false); } - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index 8c5097f94e..8f9c8b55c7 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -183,12 +183,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_rc32k_enable(true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { rtc_clk_32k_enable(false); } + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { rtc_clk_rc32k_enable(false); } diff --git a/components/esp_system/port/soc/esp32h21/clk.c b/components/esp_system/port/soc/esp32h21/clk.c index 7b21b1cbd0..b8a1fb01f3 100644 --- a/components/esp_system/port/soc/esp32h21/clk.c +++ b/components/esp_system/port/soc/esp32h21/clk.c @@ -163,12 +163,14 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_rc32k_enable(true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - // Disable unused clock sources after clock source switching is complete. // Regardless of the clock source selection, the internal 136K clock source will always keep on. - if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K && rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { rtc_clk_32k_enable(false); } + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_RC32K) { rtc_clk_rc32k_enable(false); } diff --git a/components/esp_system/port/soc/esp32h4/clk.c b/components/esp_system/port/soc/esp32h4/clk.c index d6e020517e..7d67e82ba6 100644 --- a/components/esp_system/port/soc/esp32h4/clk.c +++ b/components/esp_system/port/soc/esp32h4/clk.c @@ -145,7 +145,12 @@ static void select_rtc_slow_clk(soc_rtc_slow_clk_src_t rtc_slow_clk_src) rtc_clk_rc32k_enable(true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + rtc_clk_32k_enable(false); + } + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_OSC_SLOW) { + rtc_clk_32k_disable_external(); + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index 2b786b62f9..371018e3b5 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -179,7 +179,13 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (slow_clk == SLOW_CLK_32K_XTAL) { + rtc_clk_32k_enable(false); + } else if (slow_clk == SLOW_CLK_32K_EXT_OSC) { + rtc_clk_32k_disable_external(); + } + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable. diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index fac148fb41..b18ca20336 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -177,7 +177,13 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) rtc_clk_8m_enable(true, true); } rtc_clk_slow_src_set(rtc_slow_clk_src); - + if (rtc_slow_clk_src != SOC_RTC_SLOW_CLK_SRC_XTAL32K) { + if (slow_clk == SLOW_CLK_32K_XTAL) { + rtc_clk_32k_enable(false); + } else if (slow_clk == SLOW_CLK_32K_EXT_OSC) { + rtc_clk_32k_disable_external(); + } + } if (SLOW_CLK_CAL_CYCLES > 0) { /* TODO: 32k XTAL oscillator has some frequency drift at startup. * Improve calibration routine to wait until the frequency is stable.