refactor(spi): hal driver doesn't depend on sdkconfig.h

components/esp_driver_sdspi/include/driver/sdspi_host.h

@@ -20,8 +20,11 @@ extern "C" {
 /// Handle representing an SD SPI device
 typedef int sdspi_dev_handle_t;
 
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+#if CONFIG_IDF_TARGET_ESP32
-#define SDSPI_DEFAULT_HOST HSPI_HOST
+#define SDSPI_DEFAULT_HOST SPI2_HOST
+#define SDSPI_DEFAULT_DMA  SDSPI_DEFAULT_HOST
+#elif CONFIG_IDF_TARGET_ESP32S2
+#define SDSPI_DEFAULT_HOST SPI3_HOST
 #define SDSPI_DEFAULT_DMA  SDSPI_DEFAULT_HOST
 #else
 #define SDSPI_DEFAULT_HOST SPI2_HOST

components/esp_psram/esp32/esp_psram_impl_quad.c

@@ -171,19 +171,19 @@ typedef struct {
 //For 4MB PSRAM, we need one more SPI host, select which one to use by kconfig
 #ifdef CONFIG_SPIRAM_OCCUPY_HSPI_HOST
 #define PSRAM_SPI_MODULE    PERIPH_HSPI_MODULE
-#define PSRAM_SPI_HOST      HSPI_HOST
+#define PSRAM_SPI_HOST      SPI2_HOST
 #define PSRAM_CLK_SIGNAL    HSPICLK_OUT_IDX
 #define PSRAM_SPI_NUM       PSRAM_SPI_2
 #define PSRAM_SPICLKEN      DPORT_SPI2_CLK_EN
 #elif defined CONFIG_SPIRAM_OCCUPY_VSPI_HOST
 #define PSRAM_SPI_MODULE    PERIPH_VSPI_MODULE
-#define PSRAM_SPI_HOST      VSPI_HOST
+#define PSRAM_SPI_HOST      SPI3_HOST
 #define PSRAM_CLK_SIGNAL    VSPICLK_OUT_IDX
 #define PSRAM_SPI_NUM       PSRAM_SPI_3
 #define PSRAM_SPICLKEN      DPORT_SPI3_CLK_EN
 #else   //set to SPI avoid HSPI and VSPI being used
 #define PSRAM_SPI_MODULE    PERIPH_SPI_MODULE
-#define PSRAM_SPI_HOST      SPI_HOST
+#define PSRAM_SPI_HOST      SPI1_HOST
 #define PSRAM_CLK_SIGNAL    SPICLK_OUT_IDX
 #define PSRAM_SPI_NUM       PSRAM_SPI_1
 #define PSRAM_SPICLKEN      DPORT_SPI01_CLK_EN

components/esp_psram/test_apps/psram/main/test_4mpsram.c

@@ -49,20 +49,20 @@ bool psram_is_32mbit_ver0(void);
 
 static void test_spi_bus_occupy(spi_host_device_t expected_occupied_host)
 {
-    bool claim_hspi = spicommon_periph_claim(HSPI_HOST, "ut-hspi");
+    bool claim_hspi = spicommon_periph_claim(SPI2_HOST, "ut-hspi");
     if (claim_hspi) {
         ESP_LOGI(TAG, "HSPI claimed.");
     }
 
-    bool claim_vspi = spicommon_periph_claim(VSPI_HOST, "ut-vspi");
+    bool claim_vspi = spicommon_periph_claim(SPI3_HOST, "ut-vspi");
     if (claim_vspi) {
         ESP_LOGI(TAG, "VSPI claimed.");
     }
 
-    if (expected_occupied_host == HSPI_HOST) {
+    if (expected_occupied_host == SPI2_HOST) {
         TEST_ASSERT_FALSE(claim_hspi);
         TEST_ASSERT(claim_vspi);
-    } else if (expected_occupied_host == VSPI_HOST) {
+    } else if (expected_occupied_host == SPI3_HOST) {
         TEST_ASSERT_FALSE(claim_vspi);
         TEST_ASSERT(claim_hspi);
     } else {
@@ -90,9 +90,9 @@ TEST_CASE("some spi bus occpied by psram", "[psram_4m]")
     }
 
 #if CONFIG_SPIRAM_OCCUPY_HSPI_HOST
-    host = HSPI_HOST;
+    host = SPI2_HOST;
 #elif CONFIG_SPIRAM_OCCUPY_VSPI_HOST
-    host = VSPI_HOST;
+    host = SPI3_HOST;
 #endif
     test_spi_bus_occupy(host);
 }

components/esp_system/port/soc/esp32/clk.c

@@ -275,10 +275,10 @@ __attribute__((weak)) void esp_perip_clk_init(void)
 //a weird mode where clock to the peripheral is disabled but reset is also disabled, it 'hangs'
 //in a state where it outputs a continuous 80MHz signal. Mask its bit here because we should
 //not modify that state, regardless of what we calculated earlier.
-    if (spicommon_periph_in_use(HSPI_HOST)) {
+    if (spicommon_periph_in_use(SPI2_HOST)) {
         common_perip_clk &= ~DPORT_SPI2_CLK_EN;
     }
-    if (spicommon_periph_in_use(VSPI_HOST)) {
+    if (spicommon_periph_in_use(SPI3_HOST)) {
         common_perip_clk &= ~DPORT_SPI3_CLK_EN;
     }
 #endif

components/hal/esp32/include/hal/spi_ll.h

@@ -44,6 +44,9 @@ extern "C" {
 #define SPI_LL_CPU_MAX_BIT_LEN    (16 * 32)    //Fifo len: 16 words
 #define SPI_LL_MOSI_FREE_LEVEL    0            //Default level after bus initialized
 
+#define SPI_LL_SLAVE_NEEDS_RESET_WORKAROUND 1
+#define SPI_LL_SUPPORT_TIME_TUNING          1
+
 /**
  * The data structure holding calculated clock configuration. Since the
  * calculation needs long time, it should be calculated during initialization and

components/hal/esp32/include/hal/spi_types.h

@@ -0,0 +1,21 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include_next "hal/spi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI_HOST    _Pragma ("GCC warning \"SPI_HOST is deprecated in favor of SPI1_HOST\"")  SPI1_HOST
+#define HSPI_HOST   _Pragma ("GCC warning \"HSPI_HOST is deprecated in favor of SPI2_HOST\"") SPI2_HOST
+#define VSPI_HOST   _Pragma ("GCC warning \"VSPI_HOST is deprecated in favor of SPI3_HOST\"") SPI3_HOST
+
+#ifdef __cplusplus
+}
+#endif

components/hal/esp32s2/include/hal/spi_ll.h

@@ -51,6 +51,8 @@ extern "C" {
 #define SPI_LL_MOSI_FREE_LEVEL    1            //Default level after bus initialized
 #define SPI_LL_DMA_SHARED         1            //spi_dma shared with adc and dac on S2
 
+#define SPI_LL_SUPPORT_SEG_GAP    1            // support update seg_gap_len by conf buffer
+
 /**
  * The data structure holding calculated clock configuration. Since the
  * calculation needs long time, it should be calculated during initialization and

components/hal/esp32s2/include/hal/spi_types.h

@@ -0,0 +1,21 @@
+/*
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include_next "hal/spi_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI_HOST    _Pragma ("GCC warning \"SPI_HOST is deprecated in favor of SPI1_HOST\"")  SPI1_HOST
+#define FSPI_HOST   _Pragma ("GCC warning \"FSPI_HOST is deprecated in favor of SPI2_HOST\"") SPI2_HOST
+#define HSPI_HOST   _Pragma ("GCC warning \"HSPI_HOST is deprecated in favor of SPI3_HOST\"") SPI3_HOST
+
+#ifdef __cplusplus
+}
+#endif

components/hal/include/hal/spi_slave_hal.h

@@ -24,7 +24,6 @@
 
 #pragma once
 
-#include "sdkconfig.h"
 #include "esp_types.h"
 #include "soc/soc_caps.h"
 #include "hal/dma_types.h"
@@ -194,7 +193,6 @@ void spi_slave_hal_store_result(spi_slave_hal_context_t *hal);
  */
 uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal);
 
-#if CONFIG_IDF_TARGET_ESP32
 /**
  * Check whether we need to reset the DMA according to the status of last transactions.
  *
@@ -206,7 +204,6 @@ uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal);
  * @return true if reset is needed, else false.
  */
 bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal);
-#endif //#if CONFIG_IDF_TARGET_ESP32
 
 #endif  //#if SOC_GPSPI_SUPPORTED
 

components/hal/include/hal/spi_types.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -7,21 +7,18 @@
 #pragma once
 
 #include <stdint.h>
-#include "esp_attr.h"
 #include "esp_bit_defs.h"
 #include "soc/clk_tree_defs.h"
 #include "soc/soc_caps.h"
-#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /**
- * @brief Enum with the three SPI peripherals that are software-accessible in it
+ * @brief General purpose SPI Host Controller ID.
  */
 typedef enum {
-//SPI1 can be used as GPSPI only on ESP32
     SPI1_HOST = 0,  ///< SPI1
     SPI2_HOST = 1,  ///< SPI2
 #if SOC_SPI_PERIPH_NUM > 2
@@ -76,22 +73,6 @@ typedef enum {
     SPI_CMD_HD_INT2     = BIT(9),
 } spi_command_t;
 
-/** @cond */    //Doxy command to hide preprocessor definitions from docs */
-
-//alias for different chips, deprecated for the chips after esp32s2
-#ifdef CONFIG_IDF_TARGET_ESP32
-#define SPI_HOST    SPI1_HOST
-#define HSPI_HOST   SPI2_HOST
-#define VSPI_HOST   SPI3_HOST
-#elif CONFIG_IDF_TARGET_ESP32S2
-// SPI_HOST (SPI1_HOST) is not supported by the SPI Master and SPI Slave driver on ESP32-S2 and later
-#define SPI_HOST    SPI1_HOST
-#define FSPI_HOST   SPI2_HOST
-#define HSPI_HOST   SPI3_HOST
-#endif
-
-/** @endcond */
-
 #ifdef __cplusplus
 }
 #endif

components/hal/spi_hal.c

@@ -87,7 +87,7 @@ esp_err_t spi_hal_cal_clock_conf(const spi_hal_timing_param_t *timing_param, spi
     //But these don't work for full-duplex connections.
     spi_hal_cal_timing(timing_param->clk_src_hz, eff_clk_n, timing_param->use_gpio, timing_param->input_delay_ns, &temp_conf.timing_dummy, &temp_conf.timing_miso_delay);
 
-#ifdef CONFIG_IDF_TARGET_ESP32
+#if SPI_LL_SUPPORT_TIME_TUNING
     const int freq_limit = spi_hal_get_freq_limit(timing_param->use_gpio, timing_param->input_delay_ns);
 
     SPI_HAL_CHECK(timing_param->half_duplex || temp_conf.timing_dummy == 0 || timing_param->no_compensate,
@@ -145,7 +145,7 @@ void spi_hal_cal_timing(int source_freq_hz, int eff_clk, bool gpio_is_used, int
     HAL_LOGD(SPI_HAL_TAG, "eff: %d, limit: %dk(/%d), %d dummy, %d delay", eff_clk / 1000, apbclk_kHz / (delay_apb_n + 1), delay_apb_n, dummy_required, miso_delay);
 }
 
-#ifdef CONFIG_IDF_TARGET_ESP32
+#if SPI_LL_SUPPORT_TIME_TUNING
 //TODO: IDF-6578
 int spi_hal_get_freq_limit(bool gpio_is_used, int input_delay_ns)
 {

components/hal/spi_hal_iram.c

@@ -5,7 +5,7 @@
  */
 
 // The HAL layer for SPI (common part, in iram)
-// make these functions in a seperate file to make sure all LL functions are in the IRAM.
+// make these functions in a separate file to make sure all LL functions are in the IRAM.
 
 #include "hal/spi_hal.h"
 #include "hal/assert.h"
@@ -195,8 +195,7 @@ void spi_hal_sct_format_conf_buffer(spi_hal_context_t *hal, const spi_hal_seg_co
     spi_ll_format_din_phase_conf_buffer(hal->hw, config->rx_bitlen, conf_buffer);
     spi_ll_format_done_phase_conf_buffer(hal->hw, config->cs_hold, conf_buffer);
     spi_ll_format_conf_phase_conf_buffer(hal->hw, config->seg_end, conf_buffer);
-#if CONFIG_IDF_TARGET_ESP32S2
+#if SPI_LL_SUPPORT_SEG_GAP
-    // only s2 support update seg_gap_len by conf_buffer
     spi_ll_format_conf_bitslen_buffer(hal->hw, config->seg_gap_len, conf_buffer);
 #endif
 }

components/hal/spi_slave_hal_iram.c

@@ -77,12 +77,10 @@ uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal)
     return hal->rcv_bitlen;
 }
 
-#if CONFIG_IDF_TARGET_ESP32
-//This workaround is only for esp32
 bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal)
 {
-    bool ret;
+    bool ret = false;
-    ret = false;
+#if SPI_LL_SLAVE_NEEDS_RESET_WORKAROUND
     if (hal->use_dma && hal->rx_buffer) {
         int i;
         //In case CS goes high too soon, the transfer is aborted while the DMA channel still thinks it's going. This
@@ -93,6 +91,6 @@ bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal)
             ret = true;
         }
     }
+#endif // SPI_LL_SLAVE_NEEDS_RESET_WORKAROUND
     return ret;
 }
-#endif //#if CONFIG_IDF_TARGET_ESP32

components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h

@@ -220,11 +220,11 @@ static const char TAG[] = "test_esp_flash";
 #if CONFIG_IDF_TARGET_ESP32
 flashtest_config_t config_list[] = {
     FLASHTEST_CONFIG_COMMON,
-    /* current runner doesn't have a flash on HSPI */
+    /* current runner doesn't have a flash on SPI2_HOST */
     // {
     //     .io_mode = TEST_SPI_READ_MODE,
     //     .freq_mhz = TEST_SPI_SPEED,
-    //     .host_id = HSPI_HOST,
+    //     .host_id = SPI2_HOST,
     //     .cs_id = 0,
     //     // uses GPIO matrix on esp32s2 regardless if FORCE_GPIO_MATRIX
     //     .cs_io_num = HSPI_PIN_NUM_CS,
@@ -233,7 +233,7 @@ flashtest_config_t config_list[] = {
     {
         .io_mode = TEST_SPI_READ_MODE,
         .freq_mhz = TEST_SPI_SPEED,
-        .host_id = VSPI_HOST,
+        .host_id = SPI3_HOST,
         .cs_id = 0,
         .cs_io_num = VSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
@@ -245,7 +245,7 @@ flashtest_config_t config_list[] = {
     {
         .io_mode = TEST_SPI_READ_MODE,
         .freq_mhz = TEST_SPI_SPEED,
-        .host_id = FSPI_HOST,
+        .host_id = SPI2_HOST,
         .cs_id = 0,
         .cs_io_num = FSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
@@ -253,7 +253,7 @@ flashtest_config_t config_list[] = {
     {
         .io_mode = TEST_SPI_READ_MODE,
         .freq_mhz = TEST_SPI_SPEED,
-        .host_id = HSPI_HOST,
+        .host_id = SPI3_HOST,
         .cs_id = 0,
         // uses GPIO matrix on esp32s2 regardless of FORCE_GPIO_MATRIX
         .cs_io_num = HSPI_PIN_NUM_CS,

docs/en/api-reference/peripherals/spi_master.rst

@@ -791,7 +791,7 @@ Please note that the ISR is disabled during flash operation by default. To keep
 
         1. Use full-duplex transactions instead.
         2. Disable DMA by setting the bus initialization function's last parameter to 0 as follows:
-            ``ret=spi_bus_initialize(VSPI_HOST, &buscfg, 0);``
+            ``ret=spi_bus_initialize(SPI3_HOST, &buscfg, 0);``
 
         This can prohibit you from transmitting and receiving data longer than 64 bytes.
         3. Try using the command and address fields to replace the Write phase.

docs/zh_CN/api-reference/peripherals/spi_master.rst

@@ -791,7 +791,7 @@ GPSPI 外设的时钟源可以通过设置 :cpp:member:`spi_device_handle_t::cfg
 
         1. 执行全双工传输事务。
         2. 将总线初始化函数的最后一个参数设置为 0 以禁用 DMA，即：
-            ``ret=spi_bus_initialize(VSPI_HOST, &buscfg, 0);``
+            ``ret=spi_bus_initialize(SPI3_HOST, &buscfg, 0);``
 
         此举可避免传输和接收超过 64 字节的数据。
         1. 尝试用命令和地址字段代替写入阶段。

examples/peripherals/spi_master/hd_eeprom/main/spi_eeprom_main.c

@@ -33,7 +33,7 @@
 #   define PIN_NUM_MOSI     8
 #   define PIN_NUM_CLK      6
 #  else
-#   define EEPROM_HOST      HSPI_HOST
+#   define EEPROM_HOST      SPI2_HOST
 #   define PIN_NUM_MISO     18
 #   define PIN_NUM_MOSI     23
 #   define PIN_NUM_CLK      19

examples/peripherals/spi_slave/receiver/main/app_main.c

@@ -33,11 +33,7 @@ sending a transaction. As soon as the transaction is done, the line gets set low
 //////////////////////////////////////////////////////////////////////////////////////////////////////////
 ////////////// Please update the following configuration according to your HardWare spec /////////////////
 //////////////////////////////////////////////////////////////////////////////////////////////////////////
-#ifdef CONFIG_IDF_TARGET_ESP32
-#define RCV_HOST    HSPI_HOST
-#else
 #define RCV_HOST    SPI2_HOST
-#endif
 
 #define GPIO_HANDSHAKE      2
 #define GPIO_MOSI           12

examples/peripherals/spi_slave/sender/main/app_main.c

@@ -40,11 +40,7 @@ task waits for this semaphore to be given before queueing a transmission.
 #define GPIO_SCLK           15
 #define GPIO_CS             14
 
-#ifdef CONFIG_IDF_TARGET_ESP32
-#define SENDER_HOST HSPI_HOST
-#else
 #define SENDER_HOST SPI2_HOST
-#endif
 
 //The semaphore indicating the slave is ready to receive stuff.
 static QueueHandle_t rdySem;

tools/ci/sg_rules/no_kconfig_in_hal_component.yml

@@ -21,9 +21,6 @@ ignores:
   - "components/hal/spi_flash_encrypt_hal_iram.c"
   - "components/hal/spi_flash_hal_iram.c"
   - "components/hal/spi_flash_hal.c"
-  - "components/hal/spi_hal_iram.c"
-  - "components/hal/spi_hal.c"
-  - "components/hal/spi_slave_hal_iram.c"
   - "components/hal/twai_hal_iram.c"
   - "components/hal/twai_hal.c"
   - "components/hal/usb_dwc_hal.c"
@@ -43,8 +40,6 @@ ignores:
   - "components/hal/include/hal/mmu_hal.h"
   - "components/hal/include/hal/pmu_types.h"
   - "components/hal/include/hal/sha_types.h"
-  - "components/hal/include/hal/spi_slave_hal.h"
-  - "components/hal/include/hal/spi_types.h"
   - "components/hal/include/hal/touch_sensor_legacy_types.h"
   - "components/hal/include/hal/twai_types.h"
 rule:
@@ -98,8 +93,6 @@ ignores:
   - "components/hal/include/hal/pmu_types.h"
   - "components/hal/include/hal/rtc_hal.h"
   - "components/hal/include/hal/sha_types.h"
-  - "components/hal/include/hal/spi_slave_hal.h"
-  - "components/hal/include/hal/spi_types.h"
   - "components/hal/include/hal/touch_sensor_legacy_types.h"
   - "components/hal/include/hal/twai_hal.h"
   - "components/hal/include/hal/twai_types.h"