diff --git a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c
index 164b553620..c9738ab236 100644
--- a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c
+++ b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c
@@ -30,13 +30,19 @@ TEST_CASE("sdspi probe, slot 0, HS", "[sdspi]")
     do_one_sdspi_probe(SLOT_0, SDMMC_FREQ_HIGHSPEED);
 }
 
-TEST_CASE("sdspi probe, slot 1", "[slot1][manual][ignore]")
+#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3
+//TODO: IDF-8750. Leaks too much memory, needs check
+TEST_CASE("sdspi probe, slot 1", "[sdspi]")
 {
     do_one_sdspi_probe(SLOT_1, SDMMC_FREQ_PROBING);
     do_one_sdspi_probe(SLOT_1, SDMMC_FREQ_DEFAULT);
 }
+#endif
 
-TEST_CASE("sdspi probe, slot 1, HS", "[slot1][manual][ignore]")
+#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3
+//TODO: IDF-8749
+TEST_CASE("sdspi probe, slot 1, HS", "[sdspi]")
 {
     do_one_sdspi_probe(SLOT_1, SDMMC_FREQ_HIGHSPEED);
 }
+#endif
diff --git a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c
index cd6468a825..dcc3c98dd8 100644
--- a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c
+++ b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c
@@ -26,10 +26,13 @@ TEST_CASE("sdspi read/write performance, slot 0", "[sdspi]")
     do_one_sdspi_perf_test(SLOT_0, SDMMC_FREQ_HIGHSPEED);
 }
 
-TEST_CASE("sdspi read/write performance, slot 1", "[slot1][manual][ignore]")
+#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3
+//TODO: IDF-8749
+TEST_CASE("sdspi read/write performance, slot 1", "[sdspi]")
 {
     do_one_sdspi_perf_test(SLOT_1, SDMMC_FREQ_HIGHSPEED);
 }
+#endif
 
 /* ========== Read/write tests with offset, SPI ========== */
 
@@ -48,10 +51,13 @@ TEST_CASE("sdspi read/write performance with offset, slot 0", "[sdspi]")
     do_one_sdspi_rw_test_with_offset(SLOT_0, SDMMC_FREQ_HIGHSPEED);
 }
 
-TEST_CASE("sdspi read/write performance with offset, slot 1", "[slot1][manual][ignore]")
+#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3
+//TODO: IDF-8749
+TEST_CASE("sdspi read/write performance with offset, slot 1", "[sdspi]")
 {
     do_one_sdspi_rw_test_with_offset(SLOT_1, SDMMC_FREQ_HIGHSPEED);
 }
+#endif
 
 /* ========== Read/write tests with unaligned source/destination buffer, SPI ========== */