From 99ee7d6b1834769d4c5c3cbc87c50344cf30c1ca Mon Sep 17 00:00:00 2001 From: "Planck (Lu Zeyu)" Date: Tue, 22 Aug 2023 12:00:11 +0800 Subject: [PATCH] fix(ci): fix expected intr_dump result --- .../esp_intr_dump/expected_output/esp32c2.txt | 10 +++++----- .../esp_intr_dump/expected_output/esp32c3.txt | 14 +++++++------- .../esp_intr_dump/expected_output/esp32c6.txt | 12 ++++++------ .../esp_intr_dump/expected_output/esp32h2.txt | 12 ++++++------ 4 files changed, 24 insertions(+), 24 deletions(-) diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c2.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c2.txt index 7f0ed34b7f..27b2ce6586 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c2.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c2.txt @@ -2,14 +2,14 @@ CPU 0 interrupt status: Int Level Type Status 0 * * Reserved 1 * * Reserved - 2 2 Level Used: RTC_CORE - 3 2 Level Used: SYSTIMER_TARGET2_EDGE - 4 2 Level Used: ETS_FROM_CPU_INTR0 + 2 1 Level Used: RTC_CORE + 3 1 Level Used: SYSTIMER_TARGET2_EDGE + 4 1 Level Used: ETS_FROM_CPU_INTR0 5 * * Reserved 6 * * Reserved - 7 2 Level Used: SYSTIMER_TARGET0_EDGE + 7 1 Level Used: SYSTIMER_TARGET0_EDGE 8 * * Reserved - 9 2 Level Used: UART + 9 1 Level Used: UART 10 * * Free 11 * * Free 12 * * Free diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt index cf0079d4d4..e555060c88 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c3.txt @@ -2,15 +2,15 @@ CPU 0 interrupt status: Int Level Type Status 0 * * Reserved 1 * * Reserved - 2 2 Level Used: RTC_CORE - 3 2 Level Used: SYSTIMER_TARGET2_EDGE - 4 2 Level Used: FROM_CPU_INTR0 + 2 1 Level Used: RTC_CORE + 3 1 Level Used: SYSTIMER_TARGET2_EDGE + 4 1 Level Used: FROM_CPU_INTR0 5 * * Reserved 6 * * Reserved - 7 2 Level Used: SYSTIMER_TARGET0_EDGE + 7 1 Level Used: SYSTIMER_TARGET0_EDGE 8 * * Reserved - 9 2 Level Used: TG0_WDT_LEVEL - 10 2 Level Used: UART0 + 9 1 Level Used: TG0_WDT_LEVEL + 10 1 Level Used: UART0 11 * * Free 12 * * Free 13 * * Free @@ -33,4 +33,4 @@ CPU 0 interrupt status: 30 * * Free 31 * * Free Interrupts available for general use: 17 -Shared interrupts: 0 +Shared interrupts: 0 \ No newline at end of file diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c6.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c6.txt index eaf1d5775b..efccf74798 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32c6.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32c6.txt @@ -2,18 +2,18 @@ CPU 0 interrupt status: Int Level Type Status 0 * * Reserved 1 * * Reserved - 2 2 Level Used: LP_RTC_TIMER + 2 1 Level Used: LP_RTC_TIMER 3 * * Reserved 4 * * Reserved 5 * * Reserved 6 * * Reserved 7 * * Reserved 8 * * Reserved - 9 2 Level Used: SYSTIMER_TARGET2 - 10 2 Level Used: CPU_FROM_CPU_0 - 11 2 Level Used: SYSTIMER_TARGET0 - 12 2 Level Used: TG0_WDT - 13 2 Level Used: UART0 + 9 1 Level Used: SYSTIMER_TARGET2 + 10 1 Level Used: CPU_FROM_CPU_0 + 11 1 Level Used: SYSTIMER_TARGET0 + 12 1 Level Used: TG0_WDT + 13 1 Level Used: UART0 14 * * Free 15 * * Free 16 * * Free diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt index a6b02f59f9..3b0b62f558 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt @@ -2,18 +2,18 @@ CPU 0 interrupt status: Int Level Type Status 0 * * Reserved 1 * * Reserved - 2 2 Level Used: LP_RTC_TIMER + 2 1 Level Used: LP_RTC_TIMER 3 * * Reserved 4 * * Reserved 5 * * Reserved 6 * * Reserved 7 * * Reserved 8 * * Reserved - 9 2 Level Used: SYSTIMER_TARGET2 - 10 2 Level Used: CPUFROM_CPU_0 - 11 2 Level Used: SYSTIMER_TARGET0 - 12 2 Level Used: TG0_WDT - 13 2 Level Used: UART0 + 9 1 Level Used: SYSTIMER_TARGET2 + 10 1 Level Used: CPUFROM_CPU_0 + 11 1 Level Used: SYSTIMER_TARGET0 + 12 1 Level Used: TG0_WDT + 13 1 Level Used: UART0 14 * * Free 15 * * Free 16 * * Free