diff --git a/components/soc/esp32c5/include/soc/soc_etm_source.h b/components/soc/esp32c5/include/soc/soc_etm_source.h index 32470c56fb..d3d2451430 100644 --- a/components/soc/esp32c5/include/soc/soc_etm_source.h +++ b/components/soc/esp32c5/include/soc/soc_etm_source.h @@ -30,8 +30,8 @@ #define GPIO_EVT_CH5_ANY_EDGE 22 #define GPIO_EVT_CH6_ANY_EDGE 23 #define GPIO_EVT_CH7_ANY_EDGE 24 -#define GPIO_EVT_ZERO_DET_POS 25 -#define GPIO_EVT_ZERO_DET_NEG 26 +#define GPIO_EVT_ZERO_DET_POS0 25 +#define GPIO_EVT_ZERO_DET_NEG0 26 #define LEDC_EVT_DUTY_CHNG_END_CH0 27 #define LEDC_EVT_DUTY_CHNG_END_CH1 28 #define LEDC_EVT_DUTY_CHNG_END_CH2 29 @@ -111,44 +111,44 @@ #define REGDMA_EVT_ERR1 103 #define REGDMA_EVT_ERR2 104 #define REGDMA_EVT_ERR3 105 -#define GDMA_EVT_IN_DONE_CH0 106 -#define GDMA_EVT_IN_DONE_CH1 107 -#define GDMA_EVT_IN_DONE_CH2 108 -#define GDMA_EVT_IN_SUC_EOF_CH0 109 -#define GDMA_EVT_IN_SUC_EOF_CH1 110 -#define GDMA_EVT_IN_SUC_EOF_CH2 111 -#define GDMA_EVT_IN_FIFO_EMPTY_CH0 112 -#define GDMA_EVT_IN_FIFO_EMPTY_CH1 113 -#define GDMA_EVT_IN_FIFO_EMPTY_CH2 114 -#define GDMA_EVT_IN_FIFO_FULL_CH0 115 -#define GDMA_EVT_IN_FIFO_FULL_CH1 116 -#define GDMA_EVT_IN_FIFO_FULL_CH2 117 -#define GDMA_EVT_OUT_DONE_CH0 118 -#define GDMA_EVT_OUT_DONE_CH1 119 -#define GDMA_EVT_OUT_DONE_CH2 120 -#define GDMA_EVT_OUT_EOF_CH0 121 -#define GDMA_EVT_OUT_EOF_CH1 122 -#define GDMA_EVT_OUT_EOF_CH2 123 -#define GDMA_EVT_OUT_TOTAL_EOF_CH0 124 -#define GDMA_EVT_OUT_TOTAL_EOF_CH1 125 -#define GDMA_EVT_OUT_TOTAL_EOF_CH2 126 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH0 127 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH1 128 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH2 129 -#define GDMA_EVT_OUT_FIFO_FULL_CH0 130 -#define GDMA_EVT_OUT_FIFO_FULL_CH1 131 -#define GDMA_EVT_OUT_FIFO_FULL_CH2 132 -#define TMPSNSR_EVT_OVER_LIMIT 133 -#define I2S0_EVT_RX_DONE 134 -#define I2S0_EVT_TX_DONE 135 -#define I2S0_EVT_X_WORDS_RECEIVED 136 -#define I2S0_EVT_X_WORDS_SENT 137 -#define ULP_EVT_ERR_INTR 138 -#define ULP_EVT_HALT 139 -#define ULP_EVT_START_INTR 140 -#define RTC_EVT_TICK 141 -#define RTC_EVT_OVF 142 -#define RTC_EVT_CMP 143 +#define TMPSNSR_EVT_OVER_LIMIT 106 +#define I2S0_EVT_RX_DONE 107 +#define I2S0_EVT_TX_DONE 108 +#define I2S0_EVT_X_WORDS_RECEIVED 109 +#define I2S0_EVT_X_WORDS_SENT 110 +#define ULP_EVT_ERR_INTR 111 +#define ULP_EVT_HALT 112 +#define ULP_EVT_START_INTR 113 +#define RTC_EVT_TICK 114 +#define RTC_EVT_OVF 115 +#define RTC_EVT_CMP 116 +#define GDMA_EVT_IN_DONE_CH0 117 +#define GDMA_EVT_IN_DONE_CH1 118 +#define GDMA_EVT_IN_DONE_CH2 119 +#define GDMA_EVT_IN_SUC_EOF_CH0 120 +#define GDMA_EVT_IN_SUC_EOF_CH1 121 +#define GDMA_EVT_IN_SUC_EOF_CH2 122 +#define GDMA_EVT_IN_FIFO_EMPTY_CH0 123 +#define GDMA_EVT_IN_FIFO_EMPTY_CH1 124 +#define GDMA_EVT_IN_FIFO_EMPTY_CH2 125 +#define GDMA_EVT_IN_FIFO_FULL_CH0 126 +#define GDMA_EVT_IN_FIFO_FULL_CH1 127 +#define GDMA_EVT_IN_FIFO_FULL_CH2 128 +#define GDMA_EVT_OUT_DONE_CH0 129 +#define GDMA_EVT_OUT_DONE_CH1 130 +#define GDMA_EVT_OUT_DONE_CH2 131 +#define GDMA_EVT_OUT_EOF_CH0 132 +#define GDMA_EVT_OUT_EOF_CH1 133 +#define GDMA_EVT_OUT_EOF_CH2 134 +#define GDMA_EVT_OUT_TOTAL_EOF_CH0 135 +#define GDMA_EVT_OUT_TOTAL_EOF_CH1 136 +#define GDMA_EVT_OUT_TOTAL_EOF_CH2 137 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH0 138 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH1 139 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH2 140 +#define GDMA_EVT_OUT_FIFO_FULL_CH0 141 +#define GDMA_EVT_OUT_FIFO_FULL_CH1 142 +#define GDMA_EVT_OUT_FIFO_FULL_CH2 143 #define PMU_EVT_SLEEP_WEEKUP 144 #define GPIO_TASK_CH0_SET 1 #define GPIO_TASK_CH1_SET 2 @@ -280,22 +280,22 @@ #define REGDMA_TASK_START1 128 #define REGDMA_TASK_START2 129 #define REGDMA_TASK_START3 130 -#define GDMA_TASK_IN_START_CH0 131 -#define GDMA_TASK_IN_START_CH1 132 -#define GDMA_TASK_IN_START_CH2 133 -#define GDMA_TASK_OUT_START_CH0 134 -#define GDMA_TASK_OUT_START_CH1 135 -#define GDMA_TASK_OUT_START_CH2 136 -#define TMPSNSR_TASK_START_SAMPLE 137 -#define TMPSNSR_TASK_STOP_SAMPLE 138 -#define I2S0_TASK_START_RX 139 -#define I2S0_TASK_START_TX 140 -#define I2S0_TASK_STOP_RX 141 -#define I2S0_TASK_STOP_TX 142 +#define TMPSNSR_TASK_START_SAMPLE 131 +#define TMPSNSR_TASK_STOP_SAMPLE 132 +#define I2S0_TASK_START_RX 133 +#define I2S0_TASK_START_TX 134 +#define I2S0_TASK_STOP_RX 135 +#define I2S0_TASK_STOP_TX 136 #define ULP_TASK_WAKEUP_CPU 137 #define ULP_TASK_INT_CPU 138 -#define RTC_TASK_START 145 -#define RTC_TASK_STOP 146 -#define RTC_TASK_CLR 147 -#define RTC_TASK_TRIGGERFLW 148 +#define RTC_TASK_START 139 +#define RTC_TASK_STOP 140 +#define RTC_TASK_CLR 141 +#define RTC_TASK_TRIGGERFLW 142 +#define GDMA_TASK_IN_START_CH0 143 +#define GDMA_TASK_IN_START_CH1 144 +#define GDMA_TASK_IN_START_CH2 145 +#define GDMA_TASK_OUT_START_CH0 146 +#define GDMA_TASK_OUT_START_CH1 147 +#define GDMA_TASK_OUT_START_CH2 148 #define PMU_TASK_SLEEP_REQ 149