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Merge branch 'bugfix/restart_reconfigure_flash_pins' into 'master'

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esp32: reconfigure SPI flash pins in esp_restart

See merge request !1492
This commit is contained in:
Ivan Grokhotkov
2017-11-07 12:08:52 +08:00
parent a45e9c806d 5f6be9b4ce
commit 1613044aef
1 changed files with 2 additions and 4 deletions
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6
components/esp32/system_api.c
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@ -308,16 +308,14 @@ void IRAM_ATTR esp_restart_noos()
Cache_Read_Disable(0); Cache_Read_Disable(0);
Cache_Read_Disable(1); Cache_Read_Disable(1);
#ifdef CONFIG_SPIRAM_SUPPORT // 2nd stage bootloader reconfigures SPI flash signals.
//External SPI RAM reconfigures some GPIO functions in a way that is not entirely undone in the boot rom. // Reset them to the defaults expected by ROM.
//Undo them manually so we reboot correctly.
WRITE_PERI_REG(GPIO_FUNC0_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC0_IN_SEL_CFG_REG, 0x30);
WRITE_PERI_REG(GPIO_FUNC1_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC1_IN_SEL_CFG_REG, 0x30);
WRITE_PERI_REG(GPIO_FUNC2_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC2_IN_SEL_CFG_REG, 0x30);
WRITE_PERI_REG(GPIO_FUNC3_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC3_IN_SEL_CFG_REG, 0x30);
WRITE_PERI_REG(GPIO_FUNC4_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC4_IN_SEL_CFG_REG, 0x30);
WRITE_PERI_REG(GPIO_FUNC5_IN_SEL_CFG_REG, 0x30); WRITE_PERI_REG(GPIO_FUNC5_IN_SEL_CFG_REG, 0x30);
#endif
// Reset wifi/bluetooth/ethernet/sdio (bb/mac) // Reset wifi/bluetooth/ethernet/sdio (bb/mac)
DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG,