From a70522149297b4b254e3bfb43340346ef167114b Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 8 Dec 2017 13:14:36 +0800 Subject: [PATCH 1/2] esp32: fix incorrect clock enable bit name for UART0 Closes https://github.com/espressif/esp-idf/issues/1301 --- components/esp32/clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp32/clk.c b/components/esp32/clk.c index 15b8af36c6..4c6209762f 100644 --- a/components/esp32/clk.c +++ b/components/esp32/clk.c @@ -187,7 +187,7 @@ void esp_perip_clk_init(void) common_perip_clk = DPORT_WDG_CLK_EN | DPORT_I2S0_CLK_EN | #if CONFIG_CONSOLE_UART_NUM != 0 - DPORT_UART0_CLK_EN | + DPORT_UART_CLK_EN | #endif #if CONFIG_CONSOLE_UART_NUM != 1 DPORT_UART1_CLK_EN | From bad8d3ce57e7fc617df7e68e24274616a4ff3832 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 8 Dec 2017 13:15:40 +0800 Subject: [PATCH 2/2] bootloader: don't log anything before uart_console_configure is called --- .../bootloader/subproject/main/bootloader_start.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/components/bootloader/subproject/main/bootloader_start.c b/components/bootloader/subproject/main/bootloader_start.c index 99fb398fbe..83e6811895 100644 --- a/components/bootloader/subproject/main/bootloader_start.c +++ b/components/bootloader/subproject/main/bootloader_start.c @@ -796,24 +796,20 @@ static void IRAM_ATTR flash_gpio_configure() if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) { // For ESP32D2WD the SPI pins are already configured - ESP_LOGI(TAG, "Detected ESP32D2WD"); - //flash clock signal should come from IO MUX. + // flash clock signal should come from IO MUX. PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) { // For ESP32PICOD2 the SPI pins are already configured - ESP_LOGI(TAG, "Detected ESP32PICOD2"); - //flash clock signal should come from IO MUX. + // flash clock signal should come from IO MUX. PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) { // For ESP32PICOD4 the SPI pins are already configured - ESP_LOGI(TAG, "Detected ESP32PICOD4"); - //flash clock signal should come from IO MUX. + // flash clock signal should come from IO MUX. PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, FUNC_SD_CLK_SPICLK); SET_PERI_REG_BITS(PERIPHS_IO_MUX_SD_CLK_U, FUN_DRV, drv, FUN_DRV_S); } else { - ESP_LOGI(TAG, "Detected ESP32"); const uint32_t spiconfig = ets_efuse_get_spiconfig(); if (spiconfig == EFUSE_SPICONFIG_SPI_DEFAULTS) { gpio_matrix_out(FLASH_CS_IO, SPICS0_OUT_IDX, 0, 0);