From 1b7004fdeb869554268f6fa75a5e40c81418e53e Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Tue, 18 Mar 2025 16:20:15 +0800 Subject: [PATCH] fix(i2s): fixed mismatch of the i2s and gdma iram-safe config Closes https://github.com/espressif/esp-idf/issues/15533 --- components/driver/Kconfig | 1 + components/driver/i2s/i2s_private.h | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/components/driver/Kconfig b/components/driver/Kconfig index 87af588303..11c2f1baf4 100644 --- a/components/driver/Kconfig +++ b/components/driver/Kconfig @@ -401,6 +401,7 @@ menu "Driver Configurations" config I2S_ISR_IRAM_SAFE bool "I2S ISR IRAM-Safe" default n + select GDMA_ISR_IRAM_SAFE if SOC_GDMA_SUPPORTED help Ensure the I2S interrupt is IRAM-Safe by allowing the interrupt handler to be executable when the cache is disabled (e.g. SPI Flash write). diff --git a/components/driver/i2s/i2s_private.h b/components/driver/i2s/i2s_private.h index 08db03abc1..ad0c27affe 100644 --- a/components/driver/i2s/i2s_private.h +++ b/components/driver/i2s/i2s_private.h @@ -25,7 +25,7 @@ extern "C" { // If ISR handler is allowed to run whilst cache is disabled, // Make sure all the code and related variables used by the handler are in the SRAM -#if CONFIG_I2S_ISR_IRAM_SAFE +#if CONFIG_I2S_ISR_IRAM_SAFE || CONFIG_GDMA_ISR_IRAM_SAFE #define I2S_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED) #define I2S_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) #else