diff --git a/components/driver/include/driver/i2c.h b/components/driver/include/driver/i2c.h index 30488fc570..a2076cc459 100644 --- a/components/driver/include/driver/i2c.h +++ b/components/driver/include/driver/i2c.h @@ -33,9 +33,39 @@ extern "C" { #define I2C_APB_CLK_FREQ APB_CLK_FREQ /*!< I2C source clock is APB clock, 80MHz */ -#define I2C_NUM_0 (0) /*!< I2C port 0 */ -#define I2C_NUM_1 (1) /*!< I2C port 1 */ #define I2C_NUM_MAX (SOC_I2C_NUM) /*!< I2C port max */ +#define I2C_NUM_0 (0) /*!< I2C port 0 */ +#if SOC_I2C_NUM >= 2 +#define I2C_NUM_1 (1) /*!< I2C port 1 */ +#endif + +// I2C clk flags for users to use, can be expanded in the future. +#define I2C_SCLK_SRC_FLAG_FOR_NOMAL (0) /*!< Any one clock source that is available for the specified frequency may be choosen*/ +#define I2C_SCLK_SRC_FLAG_AWARE_DFS (1 << 0) /*!< For REF tick clock, it won't change with APB.*/ +#define I2C_SCLK_SRC_FLAG_LIGHT_SLEEP (1 << 1) /*!< For light sleep mode.*/ + +/** + * @brief I2C initialization parameters + */ +typedef struct{ + i2c_mode_t mode; /*!< I2C mode */ + int sda_io_num; /*!< GPIO number for I2C sda signal */ + int scl_io_num; /*!< GPIO number for I2C scl signal */ + bool sda_pullup_en; /*!< Internal GPIO pull mode for I2C sda signal*/ + bool scl_pullup_en; /*!< Internal GPIO pull mode for I2C scl signal*/ + + union { + struct { + uint32_t clk_speed; /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */ + } master; /*!< I2C master config */ + struct { + uint8_t addr_10bit_en; /*!< I2C 10bit address mode enable for slave mode */ + uint16_t slave_addr; /*!< I2C address for slave mode */ + } slave; /*!< I2C slave config */ + }; + uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/ +} i2c_config_t; + typedef void *i2c_cmd_handle_t; /*!< I2C command handle */ diff --git a/components/driver/include/driver/i2s.h b/components/driver/include/driver/i2s.h index e5968ad3f7..6b53db68a2 100644 --- a/components/driver/include/driver/i2s.h +++ b/components/driver/include/driver/i2s.h @@ -25,6 +25,7 @@ #include "hal/i2s_types.h" #include "driver/periph_ctrl.h" #include "esp_intr_alloc.h" + #if SOC_I2S_SUPPORTS_ADC_DAC #include "driver/adc.h" #endif @@ -82,21 +83,6 @@ esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin); esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t dsr); #endif -/** - * @brief Set I2S dac mode, I2S built-in DAC is disabled by default - * - * @param dac_mode DAC mode configurations - see i2s_dac_mode_t - * - * @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip. - * If either of the built-in DAC channel are enabled, the other one can not - * be used as RTC DAC function at the same time. - * - * @return - * - ESP_OK Success - * - ESP_ERR_INVALID_ARG Parameter error - */ -esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode); - /** * @brief Install and start I2S driver. * @@ -331,7 +317,23 @@ esp_err_t i2s_adc_enable(i2s_port_t i2s_num); * - ESP_ERR_INVALID_STATE Driver state error */ esp_err_t i2s_adc_disable(i2s_port_t i2s_num); -#endif + +/** + * @brief Set I2S dac mode, I2S built-in DAC is disabled by default + * + * @param dac_mode DAC mode configurations - see i2s_dac_mode_t + * + * @note Built-in DAC functions are only supported on I2S0 for current ESP32 chip. + * If either of the built-in DAC channel are enabled, the other one can not + * be used as RTC DAC function at the same time. + * + * @return + * - ESP_OK Success + * - ESP_ERR_INVALID_ARG Parameter error + */ +esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode); +#endif //SOC_I2S_SUPPORTS_ADC_DAC + #ifdef __cplusplus } diff --git a/components/hal/include/hal/i2c_types.h b/components/hal/include/hal/i2c_types.h index 3d5864dc10..12147c78b7 100644 --- a/components/hal/include/hal/i2c_types.h +++ b/components/hal/include/hal/i2c_types.h @@ -79,36 +79,9 @@ typedef enum { I2C_SCLK_MAX, } i2c_sclk_t; -// I2C clk flags for users to use, can be expanded in the future. -#define I2C_SCLK_SRC_FLAG_FOR_NOMAL (0) /*!< Any one clock source that is available for the specified frequency may be choosen*/ -#define I2C_SCLK_SRC_FLAG_AWARE_DFS (1 << 0) /*!< For REF tick clock, it won't change with APB.*/ -#define I2C_SCLK_SRC_FLAG_LIGHT_SLEEP (1 << 1) /*!< For light sleep mode.*/ - /// Use the highest speed that is available for the clock source picked by clk_flags #define I2C_CLK_FREQ_MAX (-1) -/** - * @brief I2C initialization parameters - */ -typedef struct{ - i2c_mode_t mode; /*!< I2C mode */ - int sda_io_num; /*!< GPIO number for I2C sda signal */ - int scl_io_num; /*!< GPIO number for I2C scl signal */ - bool sda_pullup_en; /*!< Internal GPIO pull mode for I2C sda signal*/ - bool scl_pullup_en; /*!< Internal GPIO pull mode for I2C scl signal*/ - - union { - struct { - uint32_t clk_speed; /*!< I2C clock frequency for master mode, (no higher than 1MHz for now) */ - } master; /*!< I2C master config */ - struct { - uint8_t addr_10bit_en; /*!< I2C 10bit address mode enable for slave mode */ - uint16_t slave_addr; /*!< I2C address for slave mode */ - } slave; /*!< I2C slave config */ - }; - uint32_t clk_flags; /*!< Bitwise of ``I2C_SCLK_SRC_FLAG_**FOR_DFS**`` for clk source choice*/ -} i2c_config_t; - #if CONFIG_IDF_TARGET_ESP32 typedef enum{ I2C_CMD_RESTART = 0, /*!