diff --git a/components/esp_hw_support/port/esp32c6/cpu_region_protect.c b/components/esp_hw_support/port/esp32c6/cpu_region_protect.c
index b44d6422db..68ee9f5f29 100644
--- a/components/esp_hw_support/port/esp32c6/cpu_region_protect.c
+++ b/components/esp_hw_support/port/esp32c6/cpu_region_protect.c
@@ -179,11 +179,12 @@ void esp_cpu_configure_region_protection(void)
 #if CONFIG_ULP_COPROC_RESERVE_MEM
     // First part of LP mem is reserved for coprocessor
     PMP_ENTRY_SET(11, SOC_RTC_IRAM_LOW + CONFIG_ULP_COPROC_RESERVE_MEM, PMP_TOR | RW);
+#else // CONFIG_ULP_COPROC_RESERVE_MEM
+    // Repeat same previous entry, to ensure next entry has correct base address (TOR)
+    PMP_ENTRY_SET(11, SOC_RTC_IRAM_LOW, NONE);
+#endif // !CONFIG_ULP_COPROC_RESERVE_MEM
     PMP_ENTRY_SET(12, (int)&_rtc_text_end, PMP_TOR | RX);
     PMP_ENTRY_SET(13, SOC_RTC_IRAM_HIGH, PMP_TOR | RW);
-#endif //CONFIG_ULP_COPROC_RESERVE_MEM
-    PMP_ENTRY_SET(11, (int)&_rtc_text_end, PMP_TOR | RX);
-    PMP_ENTRY_SET(12, SOC_RTC_IRAM_HIGH, PMP_TOR | RW);
 #else
     const uint32_t pmpaddr10 = PMPADDR_NAPOT(SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH);
     PMP_ENTRY_SET(10, pmpaddr10, PMP_NAPOT | CONDITIONAL_RWX);