From 2445545a17342c514512caecf629de08ec04e211 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Wed, 19 Feb 2025 21:36:40 +0800 Subject: [PATCH] fix(esp_hw_support): fix DCDC switch bad software powerdown --- components/esp_hw_support/port/esp32p4/pmu_sleep.c | 11 +++++------ components/esp_hw_support/port/esp32p4/rtc_clk_init.c | 2 +- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/components/esp_hw_support/port/esp32p4/pmu_sleep.c b/components/esp_hw_support/port/esp32p4/pmu_sleep.c index 7cbec816d3..1d2a2b04b9 100644 --- a/components/esp_hw_support/port/esp32p4/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32p4/pmu_sleep.c @@ -318,20 +318,19 @@ void pmu_sleep_increase_ldo_volt(void) { } void pmu_sleep_shutdown_dcdc(void) { - SET_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable + REG_SET_BIT(PMU_POWER_DCDC_SWITCH_REG, PMU_FORCE_DCDC_SWITCH_PD); REG_SET_BIT(PMU_DCM_CTRL_REG, PMU_DCDC_OFF_REQ); // Decrease hp_ldo voltage. REG_SET_FIELD(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, 24); } FORCE_INLINE_ATTR void pmu_sleep_enable_dcdc(void) { - CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable + REG_CLR_BIT(PMU_POWER_DCDC_SWITCH_REG, PMU_FORCE_DCDC_SWITCH_PD); SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_ON_REQ); REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, 27); } FORCE_INLINE_ATTR void pmu_sleep_shutdown_ldo(void) { - CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable CLEAR_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_XPD); } @@ -425,11 +424,11 @@ TCM_IRAM_ATTR bool pmu_sleep_finish(bool dslp) } else #endif { - pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, 27); + pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, HP_CALI_ACTIVE_DCM_VSET_DEFAULT); + pmu_sleep_enable_dcdc(); if (pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev)) { // If sleep is rejected, the hardware wake-up process that turns on DCDC - // is skipped, and software is used to enable DCDC here. - pmu_sleep_enable_dcdc(); + // is skipped, and wait DCDC volt rise up by software here. esp_rom_delay_us(950); } pmu_sleep_shutdown_ldo(); diff --git a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c index 00cb5f09a9..51b88f7548 100644 --- a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c +++ b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c @@ -58,7 +58,7 @@ void rtc_clk_init(rtc_clk_config_t cfg) // Switch to DCDC SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_ON_REQ); - CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable + REG_CLR_BIT(PMU_POWER_DCDC_SWITCH_REG, PMU_FORCE_DCDC_SWITCH_PD); REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_ACTIVE_DCM_VSET_DEFAULT); esp_rom_delay_us(1000); CLEAR_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_XPD);