feat(lp-timer): support lp timer for C5

components/hal/esp32c5/include/hal/lp_timer_ll.h

@@ -9,11 +9,11 @@
 #pragma once
 
 #include <stdlib.h>
+#include <stdbool.h>
 #include "soc/soc.h"
-#include "soc/rtc.h"
 #include "soc/lp_timer_struct.h"
+#include "soc/lp_timer_reg.h"
 #include "soc/lp_aon_reg.h"
-#include "hal/assert.h"
 #include "hal/lp_timer_types.h"
 #include "hal/misc.h"
 #include "esp_attr.h"
@@ -22,121 +22,55 @@
 extern "C" {
 #endif
 
-/**
- * @brief  Set lp_timer alarm target
- *
- * @param  dev lp_timer source
- * @param  timer_id lp_timer target num
- * @param  value next alarm value
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].hi, main_timer_tar_high0, (value >> 32) & 0xFFFF);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(dev->target[timer_id].lo, main_timer_tar_low0, value & 0xFFFFFFFF);
 }
 
-/**
- * @brief  Enable lp_timer alarm
- *
- * @param  dev lp_timer source
- * @param  timer_id lp_timer target num
- * @param  en enable bit
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    dev->target[timer_id].hi.main_timer_tar_en0 = en;
 }
 
-/**
- * @brief  Get lp_timer low bits value of counter
- *
- * @param  dev lp_timer source
- * @param  buffer_id lp_timer counter buffer num
- *
- * @return The lp_timer low bits value of counter
- */
 FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t buffer_id)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].lo, main_timer_buf0_low);
-    return 0;
 }
 
-/**
- * @brief  Get lp_timer high bits value of counter
- *
- * @param  dev lp_timer source
- * @param  buffer_id lp_timer counter buffer num
- *
- * @return The lp_timer high bits value of counter
- */
 FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t buffer_id)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    return HAL_FORCE_READ_U32_REG_FIELD(dev->counter[buffer_id].hi, main_timer_buf0_high);
-    return 0;
 }
 
-/**
- * @brief  Update lp_timer counter
- *
- * @param  dev lp_timer source
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    dev->update.main_timer_update = 1;
 }
 
-/**
- * @brief  Clear lp_timer alarm intr status
- *
- * @param  dev lp_timer source
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    dev->int_clr.soc_wakeup_int_clr = 1;
 }
 
-/**
- * @brief  Clear lp_timer overflow intr status
- *
- * @param  dev lp_timer source
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *dev)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    dev->int_clr.overflow_clr = 1;
 }
 
-/**
- * @brief  Clear lp_timer lp_alarm intr status
- *
- * @param  dev lp_timer source
- *
- * @return None
- */
 FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_alarm_intr_status(lp_timer_dev_t *dev)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    dev->lp_int_clr.main_timer_lp_int_clr = 1;
 }
 
-/**
+FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_lp_intr_raw(lp_timer_dev_t *dev)
- * @brief  Convert lp_timer time to count
- *
- * @param  time_in_us time in us
- *
- * @return lp_timer count
- */
-FORCE_INLINE_ATTR uint64_t lp_timer_ll_time_to_count(uint64_t time_in_us)
 {
-    HAL_ASSERT(false && "lp_timer not supported yet");
+    return dev->lp_int_raw.val;
-    return 0;
+}
+
+FORCE_INLINE_ATTR void lp_timer_ll_clear_lp_intsts_mask(lp_timer_dev_t *dev, uint32_t mask)
+{
+    dev->lp_int_clr.val = mask;
 }
 
 #ifdef __cplusplus

components/soc/esp32c5/include/soc/Kconfig.soc_caps.in

@@ -123,6 +123,10 @@ config SOC_SECURE_BOOT_SUPPORTED
     bool
     default y
 
+config SOC_LP_TIMER_SUPPORTED
+    bool
+    default y
+
 config SOC_LP_PERIPHERALS_SUPPORTED
     bool
     default y
@@ -707,6 +711,14 @@ config SOC_SYSTIMER_ALARM_MISS_COMPENSATE
     bool
     default y
 
+config SOC_LP_TIMER_BIT_WIDTH_LO
+    int
+    default 32
+
+config SOC_LP_TIMER_BIT_WIDTH_HI
+    int
+    default 16
+
 config SOC_TIMER_GROUPS
     int
     default 2

components/soc/esp32c5/include/soc/soc_caps.h

@@ -60,7 +60,7 @@
 // #define SOC_APM_SUPPORTED               1  // TODO: [ESP32C5] IDF-8614, IDF-8615
 // #define SOC_PMU_SUPPORTED               1  // TODO: [ESP32C5] IDF-8667
 // #define SOC_PAU_SUPPORTED               1  // TODO: [ESP32C5] IDF-8638
-// #define SOC_LP_TIMER_SUPPORTED          1  // TODO: [ESP32C5] IDF-8636
+#define SOC_LP_TIMER_SUPPORTED          1
 // #define SOC_LP_AON_SUPPORTED            1  // TODO: [ESP32C5] IDF-8638
 #define SOC_LP_PERIPHERALS_SUPPORTED    1
 // #define SOC_LP_I2C_SUPPORTED            1  // TODO: [ESP32C5] IDF-8634
@@ -434,8 +434,8 @@
 // #define SOC_SYSTIMER_SUPPORT_ETM            1  // Systimer comparator can generate ETM event
 
 /*-------------------------- LP_TIMER CAPS ----------------------------------*/
-// #define SOC_LP_TIMER_BIT_WIDTH_LO           32 // Bit width of lp_timer low part
+#define SOC_LP_TIMER_BIT_WIDTH_LO           32 // Bit width of lp_timer low part
-// #define SOC_LP_TIMER_BIT_WIDTH_HI           16 // Bit width of lp_timer high part
+#define SOC_LP_TIMER_BIT_WIDTH_HI           16 // Bit width of lp_timer high part
 
 /*--------------------------- TIMER GROUP CAPS ---------------------------------------*/
 #define SOC_TIMER_GROUPS                  (2)