diff --git a/components/esp_hw_support/port/esp32p4/pmu_sleep.c b/components/esp_hw_support/port/esp32p4/pmu_sleep.c
index 15baf79a44..b669091f52 100644
--- a/components/esp_hw_support/port/esp32p4/pmu_sleep.c
+++ b/components/esp_hw_support/port/esp32p4/pmu_sleep.c
@@ -160,6 +160,11 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
         config->digital = digital_default;
 
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags);
+#if CONFIG_RTC_FAST_CLK_SRC_XTAL
+        analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+        analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
+        analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT;
+#endif
         config->analog = analog_default;
     } else {
         // Get light sleep digital_default
@@ -168,11 +173,32 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
 
         // Get light sleep analog default
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags);
-#if CONFIG_SPIRAM
-        analog_default.hp_sys.analog.pd_cur = 0;
-        analog_default.lp_sys[PMU_MODE_LP_SLEEP].analog.pd_cur = 0;
+
+#if !CONFIG_ESP_SLEEP_POWER_DOWN_FLASH
+        analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+        analog_default.lp_sys[PMU_MODE_LP_SLEEP].analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
 #endif
 
+#if !CONFIG_RTC_FAST_CLK_SRC_XTAL
+        if (!(pd_flags & PMU_SLEEP_PD_XTAL))
+#endif
+        {
+            // Analog parameters in HP_SLEEP
+            analog_default.hp_sys.analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+            analog_default.hp_sys.analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
+            analog_default.hp_sys.analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT;
+        }
+
+        if (!(pd_flags & PMU_SLEEP_PD_XTAL)) {
+            // Analog parameters in LP_SLEEP
+            analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON;
+            analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON;
+            analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT;
+#if !CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON
+            analog_default.lp_sys[LP(SLEEP)].analog.dbias = LP_CALI_DBIAS;
+#endif
+        }
+
 #if CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON
         power_default.hp_sys.dig_power.dcdc_switch_pd_en = 0;
         analog_default.hp_sys.analog.dcm_vset = CONFIG_ESP_SLEEP_DCM_VSET_VAL_IN_SLEEP;
@@ -181,6 +207,10 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
         config->analog = analog_default;
     }
 
+#if CONFIG_RTC_FAST_CLK_SRC_XTAL
+    power_default.hp_sys.xtal.xpd_xtal = 1;
+#endif
+
     config->power = power_default;
     pmu_sleep_param_config_t param_default = PMU_SLEEP_PARAM_CONFIG_DEFAULT(pd_flags);
     config->param = *pmu_sleep_param_config_default(&param_default, &power_default, pd_flags, adjustment, slowclk_period, fastclk_period);
@@ -277,13 +307,13 @@ void pmu_sleep_shutdown_dcdc(void) {
     SET_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable
     REG_SET_BIT(PMU_DCM_CTRL_REG, PMU_DCDC_OFF_REQ);
     // Decrease hp_ldo voltage.
-    REG_SET_FIELD(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_DBIAS, 24);
+    pmu_ll_hp_set_regulator_dbias(&PMU, PMU_MODE_HP_ACTIVE, HP_CALI_ACTIVE_DBIAS_DEFAULT);
 }
 
 void pmu_sleep_enable_dcdc(void) {
     CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable
     SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_ON_REQ);
-    REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, 27);
+    REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_ACTIVE_DCM_VSET_DEFAULT);
 }
 
 void pmu_sleep_shutdown_ldo(void) {
@@ -349,7 +379,7 @@ TCM_IRAM_ATTR bool pmu_sleep_finish(bool dslp)
     } else
 #endif
     {
-        pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, 27);
+        pmu_ll_hp_set_dcm_vset(&PMU, PMU_MODE_HP_ACTIVE, HP_CALI_ACTIVE_DCM_VSET_DEFAULT);
         if (pmu_ll_hp_is_sleep_reject(PMU_instance()->hal->dev)) {
             // If sleep is rejected, the hardware wake-up process that turns on DCDC
             // is skipped, and software is used to enable DCDC here.
diff --git a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
index 0d2bb42bf6..966b5611de 100644
--- a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
+++ b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h
@@ -16,6 +16,10 @@
 extern "C" {
 #endif
 
+#define HP_CALI_ACTIVE_DCM_VSET_DEFAULT     27 // For DCDC, about 1.25v
+#define HP_CALI_ACTIVE_DBIAS_DEFAULT        24 // For HP regulator
+#define LP_CALI_DBIAS                       29 // For LP regulator
+
 // FOR  XTAL FORCE PU IN SLEEP
 #define PMU_PD_CUR_SLEEP_ON    0
 #define PMU_BIASSLP_SLEEP_ON   0
@@ -36,6 +40,9 @@ extern "C" {
 #define PMU_HP_DBIAS_LIGHTSLEEP_0V6 1
 #define PMU_LP_DBIAS_LIGHTSLEEP_0V7 12
 
+// FOR LIGHTSLEEP: XTAL FORCE PU
+#define PMU_DBG_ATTEN_ACTIVE_DEFAULT    0
+
 // FOR DEEPSLEEP
 #define PMU_DBG_HP_DEEPSLEEP    0
 #define PMU_HP_XPD_DEEPSLEEP    0
diff --git a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
index 27624deb4a..00cb5f09a9 100644
--- a/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
+++ b/components/esp_hw_support/port/esp32p4/rtc_clk_init.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -27,9 +27,6 @@
 
 static const char *TAG = "rtc_clk_init";
 
-static uint32_t HP_CALI_DBIAS = 27; //about 1.25v
-static uint32_t LP_CALI_DBIAS = 29; //about 1.25v
-
 void rtc_clk_init(rtc_clk_config_t cfg)
 {
     rtc_cpu_freq_config_t old_config, new_config;
@@ -62,7 +59,7 @@ void rtc_clk_init(rtc_clk_config_t cfg)
     // Switch to DCDC
     SET_PERI_REG_MASK(PMU_DCM_CTRL_REG, PMU_DCDC_ON_REQ);
     CLEAR_PERI_REG_MASK(LP_SYSTEM_REG_SYS_CTRL_REG, LP_SYSTEM_REG_LP_FIB_DCDC_SWITCH); //0: enable, 1: disable
-    REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_DBIAS);
+    REG_SET_FIELD(PMU_HP_ACTIVE_BIAS_REG, PMU_HP_ACTIVE_DCM_VSET, HP_CALI_ACTIVE_DCM_VSET_DEFAULT);
     esp_rom_delay_us(1000);
     CLEAR_PERI_REG_MASK(PMU_HP_ACTIVE_HP_REGULATOR0_REG, PMU_HP_ACTIVE_HP_REGULATOR_XPD);