diff --git a/components/driver/i2c.c b/components/driver/i2c.c
index e2686318dd..17bdfbb996 100644
--- a/components/driver/i2c.c
+++ b/components/driver/i2c.c
@@ -435,6 +435,14 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg)
 {
     i2c_obj_t *p_i2c = (i2c_obj_t *) arg;
     int i2c_num = p_i2c->i2c_num;
+    // Interrupt protection.
+    // On S2 target, the I2C may trigger a spurious interrupt,
+    // in order to detect these false positive, check the I2C's hardware interrupt mask
+    uint32_t int_mask;
+    i2c_hal_get_intsts_mask(&(i2c_context[i2c_num].hal), &int_mask);
+    if (int_mask == 0) {
+        return;
+    }
     i2c_intr_event_t evt_type = I2C_INTR_EVENT_ERR;
     portBASE_TYPE HPTaskAwoken = pdFALSE;
     portBASE_TYPE HPTaskAwokenCallee = pdFALSE;
@@ -459,6 +467,9 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg)
             if (p_i2c->status != I2C_STATUS_ACK_ERROR && p_i2c->status != I2C_STATUS_IDLE) {
                 i2c_master_cmd_begin_static(i2c_num, &HPTaskAwokenCallee);
             }
+        } else {
+            // Do nothing if there is no proper event.
+            return;
         }
         i2c_cmd_evt_t evt = {
             .type = I2C_CMD_EVT_ALIVE
@@ -555,6 +566,8 @@ static esp_err_t i2c_master_clear_bus(i2c_port_t i2c_num)
  **/
 static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num)
 {
+// A workaround for avoiding cause timeout issue when using
+// hardware reset.
 #if !I2C_SUPPORT_HW_FSM_RST
     int scl_low_period, scl_high_period;
     int scl_start_hold, scl_rstart_setup;
diff --git a/components/soc/soc/esp32s2/include/soc/i2c_caps.h b/components/soc/soc/esp32s2/include/soc/i2c_caps.h
index 08f452ee3e..9d5e4478a8 100644
--- a/components/soc/soc/esp32s2/include/soc/i2c_caps.h
+++ b/components/soc/soc/esp32s2/include/soc/i2c_caps.h
@@ -24,8 +24,7 @@ extern "C" {
 #define SOC_I2C_FIFO_LEN       (32) /*!< I2C hardware FIFO depth */
 #define I2C_INTR_MASK          (0x1ffff) /*!< I2C all interrupt bitmap */
 
-//ESP32-S2 support hardware FSM reset
-#define I2C_SUPPORT_HW_FSM_RST  (1)
+// FSM_RST only resets the FSM, not using it. So I2C_SUPPORT_HW_FSM_RST not defined.
 //ESP32-S2 support hardware clear bus
 #define I2C_SUPPORT_HW_CLR_BUS  (1)