From 63e4510e9e1193cc24e95313401a78e443391d80 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Wed, 27 Jan 2021 17:11:33 +0800 Subject: [PATCH 1/2] flash_encryption: Quick fixed the issue that block when flash_encryption_write, Related https://github.com/espressif/esp-idf/issues/6322, Related https://github.com/espressif/esp-idf/issues/6254 --- .../esp_rom/include/esp32/rom/spi_flash.h | 1 + components/spi_flash/flash_ops.c | 61 +++++++++++++++++++ tools/ci/config/target-test.yml | 8 +++ .../configs/flash_encryption_psram | 14 +++++ 4 files changed, 84 insertions(+) create mode 100644 tools/unit-test-app/configs/flash_encryption_psram diff --git a/components/esp_rom/include/esp32/rom/spi_flash.h b/components/esp_rom/include/esp32/rom/spi_flash.h index b78a6130aa..f4b17ae5be 100644 --- a/components/esp_rom/include/esp32/rom/spi_flash.h +++ b/components/esp_rom/include/esp32/rom/spi_flash.h @@ -124,6 +124,7 @@ extern "C" { //Extra dummy for flash read #define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M 0 +#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M 0 #define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M 1 #define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M 2 diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index 5766846fa3..13cb8028e0 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -461,10 +461,70 @@ out: } #endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL +#if !CONFIG_SPI_FLASH_USE_LEGACY_IMPL +extern void spi_common_set_dummy_output(esp_rom_spiflash_read_mode_t mode); +extern void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv); +static void IRAM_ATTR flash_rom_init(void) +{ + uint32_t freqdiv = 0; + esp_rom_spiflash_read_mode_t read_mode; + +#if CONFIG_IDF_TARGET_ESP32 + uint32_t dummy_bit = 0; +#if CONFIG_ESPTOOLPY_FLASHFREQ_80M + dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M + dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_26M + dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M + dummy_bit = ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M; +#endif +#endif//CONFIG_IDF_TARGET_ESP32 + +#if CONFIG_ESPTOOLPY_FLASHFREQ_80M + freqdiv = 1; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M + freqdiv = 2; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_26M + freqdiv = 3; +#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M + freqdiv = 4; +#endif + +#if CONFIG_ESPTOOLPY_FLASHMODE_QIO + read_mode = ESP_ROM_SPIFLASH_QIO_MODE; +#elif CONFIG_ESPTOOLPY_FLASHMODE_QOUT + read_mode = ESP_ROM_SPIFLASH_QOUT_MODE; +#elif CONFIG_ESPTOOLPY_FLASHMODE_DIO + read_mode = ESP_ROM_SPIFLASH_DIO_MODE; +#elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT + read_mode = ESP_ROM_SPIFLASH_DOUT_MODE; +#endif + +#if CONFIG_IDF_TARGET_ESP32 + g_rom_spiflash_dummy_len_plus[1] = dummy_bit; +#else + spi_dummy_len_fix(1, freqdiv); +#endif //CONFIG_IDF_TARGET_ESP32 + +#if !CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_IDF_TARGET_ESP32 + spi_common_set_dummy_output(read_mode); +#endif //!CONFIG_IDF_TARGET_ESP32S2 + esp_rom_spiflash_config_readmode(read_mode); + esp_rom_spiflash_config_clk(freqdiv, 1); +} +#else +static void IRAM_ATTR flash_rom_init(void) +{ + return; +} +#endif // !CONFIG_SPI_FLASH_USE_LEGACY_IMPL esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size) { esp_err_t err = ESP_OK; + flash_rom_init(); CHECK_WRITE_ADDRESS(dest_addr, size); if ((dest_addr % 16) != 0) { return ESP_ERR_INVALID_ARG; @@ -708,6 +768,7 @@ out: esp_err_t IRAM_ATTR spi_flash_read_encrypted(size_t src, void *dstv, size_t size) { + flash_rom_init(); if (src + size > g_rom_flashchip.chip_size) { return ESP_ERR_INVALID_SIZE; } diff --git a/tools/ci/config/target-test.yml b/tools/ci/config/target-test.yml index faea8db140..b6d5bea0a7 100644 --- a/tools/ci/config/target-test.yml +++ b/tools/ci/config/target-test.yml @@ -410,6 +410,14 @@ UT_020: - Example_SPI_Multi_device - psram +UT_021: + extends: .unit_test_32_template + parallel: 2 + tags: + - ESP32_IDF + - psram + - UT_T1_FlashEncryption + UT_022: extends: .unit_test_template tags: diff --git a/tools/unit-test-app/configs/flash_encryption_psram b/tools/unit-test-app/configs/flash_encryption_psram new file mode 100644 index 0000000000..13648e1d12 --- /dev/null +++ b/tools/unit-test-app/configs/flash_encryption_psram @@ -0,0 +1,14 @@ +# This config is for ESP32 only (no ESP32-S2/S3 flash encryption support yet, ESP32-C3 has no psram) +CONFIG_IDF_TARGET="esp32" +TEST_COMPONENTS=spi_flash +TEST_GROUPS=flash_encryption +CONFIG_SECURE_FLASH_ENC_ENABLED=y +CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=y +CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=y +CONFIG_SECURE_BOOT_ALLOW_JTAG=y +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=y +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=y +CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=y +CONFIG_SECURE_FLASH_REQUIRE_ALREADY_ENABLED=y +CONFIG_ESP32_SPIRAM_SUPPORT=y +CONFIG_ESPTOOLPY_FLASHFREQ_80M=y From 2333667cb58d5cbe4a3137fceb87a873f24af6b8 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Fri, 19 Feb 2021 11:50:27 +0800 Subject: [PATCH 2/2] ota: fix ota with flash encryption --- components/spi_flash/esp32/flash_ops_esp32.c | 2 ++ .../esp32s2beta/flash_ops_esp32s2beta.c | 2 ++ components/spi_flash/flash_ops.c | 18 +++++++++--------- tools/ci/config/target-test.yml | 2 +- 4 files changed, 14 insertions(+), 10 deletions(-) diff --git a/components/spi_flash/esp32/flash_ops_esp32.c b/components/spi_flash/esp32/flash_ops_esp32.c index e23e1aa540..c7b7a07afe 100644 --- a/components/spi_flash/esp32/flash_ops_esp32.c +++ b/components/spi_flash/esp32/flash_ops_esp32.c @@ -32,6 +32,7 @@ static inline void IRAM_ATTR spi_flash_guard_end(void) } } +extern void IRAM_ATTR flash_rom_init(void); esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_addr, const void *src, size_t size) { const uint8_t *ssrc = (const uint8_t *)src; @@ -73,6 +74,7 @@ esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_a } spi_flash_guard_start(); + flash_rom_init(); rc = esp_rom_spiflash_write_encrypted(row_addr, (uint32_t *)encrypt_buf, 32); spi_flash_guard_end(); if (rc != ESP_ROM_SPIFLASH_RESULT_OK) { diff --git a/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c b/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c index d8f738cac0..876fb0e62b 100644 --- a/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c +++ b/components/spi_flash/esp32s2beta/flash_ops_esp32s2beta.c @@ -23,6 +23,7 @@ #include "hal/spi_flash_hal.h" #include "esp_flash.h" +extern void IRAM_ATTR flash_rom_init(void); esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_addr, const void *src, size_t size) { const spi_flash_guard_funcs_t *ops = spi_flash_guard_get(); @@ -59,6 +60,7 @@ esp_rom_spiflash_result_t IRAM_ATTR spi_flash_write_encrypted_chip(size_t dest_a if (ops && ops->start) { ops->start(); } + flash_rom_init(); rc = SPI_Encrypt_Write(dest_addr, src, size); if (ops && ops->end) { ops->end(); diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c index 13cb8028e0..f9f532045c 100644 --- a/components/spi_flash/flash_ops.c +++ b/components/spi_flash/flash_ops.c @@ -461,13 +461,13 @@ out: } #endif // CONFIG_SPI_FLASH_USE_LEGACY_IMPL -#if !CONFIG_SPI_FLASH_USE_LEGACY_IMPL +#ifndef CONFIG_SPI_FLASH_USE_LEGACY_IMPL extern void spi_common_set_dummy_output(esp_rom_spiflash_read_mode_t mode); extern void spi_dummy_len_fix(uint8_t spi, uint8_t freqdiv); -static void IRAM_ATTR flash_rom_init(void) +extern uint8_t g_rom_spiflash_dummy_len_plus[]; +void IRAM_ATTR flash_rom_init(void) { uint32_t freqdiv = 0; - esp_rom_spiflash_read_mode_t read_mode; #if CONFIG_IDF_TARGET_ESP32 uint32_t dummy_bit = 0; @@ -492,6 +492,8 @@ static void IRAM_ATTR flash_rom_init(void) freqdiv = 4; #endif +#if !CONFIG_IDF_TARGET_ESP32S2BETA && !CONFIG_IDF_TARGET_ESP32 + esp_rom_spiflash_read_mode_t read_mode; #if CONFIG_ESPTOOLPY_FLASHMODE_QIO read_mode = ESP_ROM_SPIFLASH_QIO_MODE; #elif CONFIG_ESPTOOLPY_FLASHMODE_QOUT @@ -501,6 +503,7 @@ static void IRAM_ATTR flash_rom_init(void) #elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT read_mode = ESP_ROM_SPIFLASH_DOUT_MODE; #endif +#endif //!CONFIG_IDF_TARGET_ESP32S2BETA && !CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32 g_rom_spiflash_dummy_len_plus[1] = dummy_bit; @@ -508,14 +511,13 @@ static void IRAM_ATTR flash_rom_init(void) spi_dummy_len_fix(1, freqdiv); #endif //CONFIG_IDF_TARGET_ESP32 -#if !CONFIG_IDF_TARGET_ESP32S2 && !CONFIG_IDF_TARGET_ESP32 +#if !CONFIG_IDF_TARGET_ESP32S2BETA && !CONFIG_IDF_TARGET_ESP32 spi_common_set_dummy_output(read_mode); -#endif //!CONFIG_IDF_TARGET_ESP32S2 - esp_rom_spiflash_config_readmode(read_mode); +#endif //!CONFIG_IDF_TARGET_ESP32S2BETA esp_rom_spiflash_config_clk(freqdiv, 1); } #else -static void IRAM_ATTR flash_rom_init(void) +void IRAM_ATTR flash_rom_init(void) { return; } @@ -524,7 +526,6 @@ static void IRAM_ATTR flash_rom_init(void) esp_err_t IRAM_ATTR spi_flash_write_encrypted(size_t dest_addr, const void *src, size_t size) { esp_err_t err = ESP_OK; - flash_rom_init(); CHECK_WRITE_ADDRESS(dest_addr, size); if ((dest_addr % 16) != 0) { return ESP_ERR_INVALID_ARG; @@ -768,7 +769,6 @@ out: esp_err_t IRAM_ATTR spi_flash_read_encrypted(size_t src, void *dstv, size_t size) { - flash_rom_init(); if (src + size > g_rom_flashchip.chip_size) { return ESP_ERR_INVALID_SIZE; } diff --git a/tools/ci/config/target-test.yml b/tools/ci/config/target-test.yml index b6d5bea0a7..8106974f92 100644 --- a/tools/ci/config/target-test.yml +++ b/tools/ci/config/target-test.yml @@ -411,7 +411,7 @@ UT_020: - psram UT_021: - extends: .unit_test_32_template + extends: .unit_test_template parallel: 2 tags: - ESP32_IDF