forked from espressif/esp-idf
fix(i2s): fix uninitialize warning for the default macros
Closes https://github.com/espressif/esp-idf/issues/15271
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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@@ -193,6 +193,7 @@ extern "C" {
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I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(bits_per_sample, mono_or_stereo) // Alias
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I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(bits_per_sample, mono_or_stereo) // Alias
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/** @endcond */
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/** @endcond */
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#if SOC_I2S_HW_VERSION_1
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/**
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/**
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* @brief I2S default standard clock configuration
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* @brief I2S default standard clock configuration
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* @note Please set the mclk_multiple to I2S_MCLK_MULTIPLE_384 while using 24 bits data width
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* @note Please set the mclk_multiple to I2S_MCLK_MULTIPLE_384 while using 24 bits data width
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@@ -204,6 +205,20 @@ extern "C" {
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.clk_src = I2S_CLK_SRC_DEFAULT, \
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.clk_src = I2S_CLK_SRC_DEFAULT, \
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.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
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.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
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}
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}
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#else
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/**
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* @brief I2S default standard clock configuration
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* @note Please set the mclk_multiple to I2S_MCLK_MULTIPLE_384 while using 24 bits data width
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* Otherwise the sample rate might be imprecise since the BCLK division is not a integer
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* @param rate sample rate
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*/
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#define I2S_STD_CLK_DEFAULT_CONFIG(rate) { \
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.sample_rate_hz = rate, \
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.clk_src = I2S_CLK_SRC_DEFAULT, \
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.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
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.ext_clk_freq_hz = 0, \
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}
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#endif
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/**
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/**
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* @brief I2S slot configuration for standard mode
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* @brief I2S slot configuration for standard mode
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@@ -122,6 +122,7 @@ extern "C" {
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#define I2S_TDM_CLK_DEFAULT_CONFIG(rate) { \
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#define I2S_TDM_CLK_DEFAULT_CONFIG(rate) { \
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.sample_rate_hz = rate, \
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.sample_rate_hz = rate, \
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.clk_src = I2S_CLK_SRC_DEFAULT, \
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.clk_src = I2S_CLK_SRC_DEFAULT, \
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.ext_clk_freq_hz = 0, \
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.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
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.mclk_multiple = I2S_MCLK_MULTIPLE_256, \
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.bclk_div = 8, \
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.bclk_div = 8, \
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}
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}
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