forked from espressif/esp-idf
refactor(esp_hw_support): move TIMG_WDT_WKEY_VALUE defination from hal to soc
This commit is contained in:
@@ -26,9 +26,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -26,9 +26,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -26,9 +26,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -27,9 +27,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -27,9 +27,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -26,9 +26,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -27,9 +27,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -26,9 +26,6 @@ extern "C" {
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
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#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_INT 1
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@@ -16,6 +16,9 @@
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extern "C" {
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extern "C" {
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#endif
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#endif
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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typedef struct {
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typedef struct {
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struct {
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struct {
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const periph_module_t module; // Peripheral module
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const periph_module_t module; // Peripheral module
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