diff --git a/components/driver/deprecated/timer_legacy.c b/components/driver/deprecated/timer_legacy.c index 5b692f04e9..27c446836b 100644 --- a/components/driver/deprecated/timer_legacy.c +++ b/components/driver/deprecated/timer_legacy.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -332,8 +332,8 @@ esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer GPTIMER_CLOCK_SRC_ATOMIC() { // although `clk_src` is of `timer_src_clk_t` type, but it's binary compatible with `gptimer_clock_source_t`, // as the underlying enum entries come from the same `soc_module_clk_t` - timer_ll_set_clock_source(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, (gptimer_clock_source_t)clk_src); - timer_ll_enable_clock(hal->dev, timer_num, true); + timer_ll_set_clock_source(group_num, timer_num, (gptimer_clock_source_t)clk_src); + timer_ll_enable_clock(group_num, timer_num, true); } timer_ll_set_clock_prescale(hal->dev, timer_num, config->divider); timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, config->counter_dir); @@ -362,7 +362,7 @@ esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num) // disable the source clock GPTIMER_CLOCK_SRC_ATOMIC() { - timer_ll_enable_clock(hal->dev, hal->timer_id, false); + timer_ll_enable_clock(group_num, hal->timer_id, false); } TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]); timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false); diff --git a/components/esp_driver_gptimer/src/gptimer.c b/components/esp_driver_gptimer/src/gptimer.c index 3b73e946a8..63b6dc9ecc 100644 --- a/components/esp_driver_gptimer/src/gptimer.c +++ b/components/esp_driver_gptimer/src/gptimer.c @@ -195,7 +195,7 @@ esp_err_t gptimer_del_timer(gptimer_handle_t timer) ESP_LOGD(TAG, "del timer (%d,%d)", group_id, timer_id); // disable the source clock GPTIMER_CLOCK_SRC_ATOMIC() { - timer_ll_enable_clock(hal->dev, hal->timer_id, false); + timer_ll_enable_clock(group_id, hal->timer_id, false); } timer_hal_deinit(hal); // recycle memory resource diff --git a/components/esp_driver_gptimer/src/gptimer_common.c b/components/esp_driver_gptimer/src/gptimer_common.c index c873e0e74b..6b89e8a957 100644 --- a/components/esp_driver_gptimer/src/gptimer_common.c +++ b/components/esp_driver_gptimer/src/gptimer_common.c @@ -90,7 +90,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s { uint32_t counter_src_hz = 0; int timer_id = timer->timer_id; - + int group_id = timer->group->group_id; // TODO: [clk_tree] to use a generic clock enable/disable or acquire/release function for all clock source #if SOC_TIMER_GROUP_SUPPORT_RC_FAST if (src_clk == GPTIMER_CLK_SRC_RC_FAST) { @@ -134,7 +134,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s #endif // CONFIG_IDF_TARGET_ESP32C2 if (need_pm_lock) { - sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0 + sprintf(timer->pm_lock_name, "gptimer_%d_%d", group_id, timer_id); // e.g. gptimer_0_0 ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer->pm_lock_name, &timer->pm_lock), TAG, "create pm lock failed"); } @@ -145,8 +145,8 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s // on some ESP chip, different peripheral's clock source setting are mixed in the same register // so we need to make this done in an atomic way GPTIMER_CLOCK_SRC_ATOMIC() { - timer_ll_set_clock_source(timer->hal.dev, timer_id, src_clk); - timer_ll_enable_clock(timer->hal.dev, timer_id, true); + timer_ll_set_clock_source(group_id, timer_id, src_clk); + timer_ll_enable_clock(group_id, timer_id, true); } timer->clk_src = src_clk; uint32_t prescale = counter_src_hz / resolution_hz; // potential resolution loss here diff --git a/components/esp_system/port/soc/esp32c6/clk.c b/components/esp_system/port/soc/esp32c6/clk.c index 6b8355392a..77a19472df 100644 --- a/components/esp_system/port/soc/esp32c6/clk.c +++ b/components/esp_system/port/soc/esp32c6/clk.c @@ -255,8 +255,8 @@ __attribute__((weak)) void esp_perip_clk_init(void) rmt_ll_enable_group_clock(0, false); ledc_ll_enable_clock(&LEDC, false); ledc_ll_enable_bus_clock(false); - timer_ll_enable_clock(&TIMERG0, 0, false); - timer_ll_enable_clock(&TIMERG1, 0, false); + timer_ll_enable_clock(0, 0, false); + timer_ll_enable_clock(1, 0, false); _timer_ll_enable_bus_clock(0, false); _timer_ll_enable_bus_clock(1, false); twai_ll_enable_clock(0, false); diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index 22728803b0..8c5097f94e 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -244,8 +244,8 @@ __attribute__((weak)) void esp_perip_clk_init(void) rmt_ll_enable_group_clock(0, false); ledc_ll_enable_clock(&LEDC, false); ledc_ll_enable_bus_clock(false); - timer_ll_enable_clock(&TIMERG0, 0, false); - timer_ll_enable_clock(&TIMERG1, 0, false); + timer_ll_enable_clock(0, 0, false); + timer_ll_enable_clock(1, 0, false); _timer_ll_enable_bus_clock(0, false); _timer_ll_enable_bus_clock(1, false); twai_ll_enable_clock(0, false); diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c index ecaa791fc8..34202d2dc0 100644 --- a/components/esp_system/port/soc/esp32p4/clk.c +++ b/components/esp_system/port/soc/esp32p4/clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -276,12 +276,12 @@ __attribute__((weak)) void esp_perip_clk_init(void) _uart_ll_sclk_disable(&UART4); _timer_ll_enable_bus_clock(0, false); - _timer_ll_enable_clock(&TIMERG0, 0, false); - _timer_ll_enable_clock(&TIMERG0, 1, false); + _timer_ll_enable_clock(0, 0, false); + _timer_ll_enable_clock(0, 1, false); _timer_ll_enable_bus_clock(1, false); - _timer_ll_enable_clock(&TIMERG1, 0, false); - _timer_ll_enable_clock(&TIMERG1, 1, false); + _timer_ll_enable_clock(1, 0, false); + _timer_ll_enable_clock(1, 1, false); mipi_dsi_brg_ll_enable_ref_clock(&MIPI_DSI_BRIDGE, false); _mipi_csi_ll_enable_host_bus_clock(0, false); diff --git a/components/esp_tee/test_apps/tee_test_fw/components/test_sec_srv/src/test_interrupt.c b/components/esp_tee/test_apps/tee_test_fw/components/test_sec_srv/src/test_interrupt.c index 021a25901d..760244c95b 100644 --- a/components/esp_tee/test_apps/tee_test_fw/components/test_sec_srv/src/test_interrupt.c +++ b/components/esp_tee/test_apps/tee_test_fw/components/test_sec_srv/src/test_interrupt.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -23,6 +23,7 @@ #define TIMER_ALARM_PERIOD_S 0.10 // sample test interval for the first timer /* TEE uses Group0 Timer0 */ +#define TEE_SECURE_GROUP 0 #define TEE_SECURE_TIMER 0 static const char *TAG = "esp_tee_intr_test"; @@ -56,16 +57,17 @@ static void tee_timer_enable(void) ESP_LOGI(TAG, "Enabling test timer from secure world"); /* Enable TG0 peripheral module */ - periph_ll_enable_clk_clear_rst(PERIPH_TIMG0_MODULE); + _timer_ll_enable_bus_clock(TEE_SECURE_GROUP, true); + _timer_ll_reset_register(TEE_SECURE_GROUP); /* Stop counter, alarm, auto-reload at first place */ - timer_ll_enable_clock(timg_hw, TEE_SECURE_TIMER, true); + timer_ll_enable_clock(TEE_SECURE_GROUP, TEE_SECURE_TIMER, true); timer_ll_enable_counter(timg_hw, TEE_SECURE_TIMER, false); timer_ll_enable_auto_reload(timg_hw, TEE_SECURE_TIMER, false); timer_ll_enable_alarm(timg_hw, TEE_SECURE_TIMER, false); // Set clock source - timer_ll_set_clock_source(timg_hw, TEE_SECURE_TIMER, GPTIMER_CLK_SRC_DEFAULT); + timer_ll_set_clock_source(TEE_SECURE_GROUP, TEE_SECURE_TIMER, GPTIMER_CLK_SRC_DEFAULT); timer_ll_set_clock_prescale(timg_hw, TEE_SECURE_TIMER, TIMER_DIVIDER); // Initialize counter value to zero diff --git a/components/hal/esp32/include/hal/timer_ll.h b/components/hal/esp32/include/hal/timer_ll.h index 8fa86e6044..29bd9fd64f 100644 --- a/components/hal/esp32/include/hal/timer_ll.h +++ b/components/hal/esp32/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -76,12 +76,14 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { + (void)group_id; + (void)timer_num; switch (clk_src) { case GPTIMER_CLK_SRC_APB: break; @@ -96,13 +98,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, * * @note This function is not optional, created for backward compatible. * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { - (void)hw; + (void)group_id; (void)timer_num; (void)en; } diff --git a/components/hal/esp32c2/include/hal/timer_ll.h b/components/hal/esp32c2/include/hal/timer_ll.h index f1a8ebaf9f..c9012917fb 100644 --- a/components/hal/esp32c2/include/hal/timer_ll.h +++ b/components/hal/esp32c2/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -64,12 +64,13 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); switch (clk_src) { case GPTIMER_CLK_SRC_PLL_F40M: hw->hw_timer[timer_num].config.tx_use_xtal = 0; @@ -86,13 +87,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in the group + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); hw->regclk.timer_clk_is_active = en; } diff --git a/components/hal/esp32c3/include/hal/timer_ll.h b/components/hal/esp32c3/include/hal/timer_ll.h index 383f550b18..c7cb579aac 100644 --- a/components/hal/esp32c3/include/hal/timer_ll.h +++ b/components/hal/esp32c3/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -72,12 +72,13 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); switch (clk_src) { case GPTIMER_CLK_SRC_APB: hw->hw_timer[timer_num].config.tx_use_xtal = 0; @@ -94,13 +95,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in the group + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); hw->regclk.timer_clk_is_active = en; } diff --git a/components/hal/esp32c5/include/hal/timer_ll.h b/components/hal/esp32c5/include/hal/timer_ll.h index 7798f6c7ba..f8f854b967 100644 --- a/components/hal/esp32c5/include/hal/timer_ll.h +++ b/components/hal/esp32c5/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -99,11 +99,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group uint8_t clk_id = 0; @@ -121,7 +121,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_sel = clk_id; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_sel = clk_id; @@ -131,14 +131,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = en; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = en; diff --git a/components/hal/esp32c6/include/hal/timer_ll.h b/components/hal/esp32c6/include/hal/timer_ll.h index bc507a3877..15a6d9f88b 100644 --- a/components/hal/esp32c6/include/hal/timer_ll.h +++ b/components/hal/esp32c6/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -99,11 +99,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group uint8_t clk_id = 0; @@ -121,7 +121,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_sel = clk_id; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_sel = clk_id; @@ -131,14 +131,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = en; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = en; diff --git a/components/hal/esp32c61/include/hal/timer_ll.h b/components/hal/esp32c61/include/hal/timer_ll.h index b8b56465dc..158ae7db7f 100644 --- a/components/hal/esp32c61/include/hal/timer_ll.h +++ b/components/hal/esp32c61/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -99,11 +99,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group uint8_t clk_id = 0; @@ -121,7 +121,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_sel = clk_id; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_sel = clk_id; @@ -131,14 +131,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = en; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = en; diff --git a/components/hal/esp32h2/include/hal/timer_ll.h b/components/hal/esp32h2/include/hal/timer_ll.h index b62bdb4db8..32fd260d5c 100644 --- a/components/hal/esp32h2/include/hal/timer_ll.h +++ b/components/hal/esp32h2/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -99,11 +99,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group uint8_t clk_id = 0; @@ -121,7 +121,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_sel = clk_id; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_sel = clk_id; @@ -131,14 +131,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = en; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = en; diff --git a/components/hal/esp32h21/include/hal/timer_ll.h b/components/hal/esp32h21/include/hal/timer_ll.h index b191b23826..25dafaa1cf 100644 --- a/components/hal/esp32h21/include/hal/timer_ll.h +++ b/components/hal/esp32h21/include/hal/timer_ll.h @@ -92,14 +92,13 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group - uint8_t group_id = (hw == &TIMERG0) ? 0 : 1; switch (clk_src) { case GPTIMER_CLK_SRC_XTAL: PCR.timergroup[group_id].timergroup_timer_clk_conf.tg_timer_clk_sel = 0; @@ -119,15 +118,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - uint8_t group_id = (hw == &TIMERG0) ? 0 : 1; - PCR.timergroup[group_id].timergroup_timer_clk_conf.tg_timer_clk_en = en; } diff --git a/components/hal/esp32h4/include/hal/timer_ll.h b/components/hal/esp32h4/include/hal/timer_ll.h index b5cac8b67f..be0e6d1868 100644 --- a/components/hal/esp32h4/include/hal/timer_ll.h +++ b/components/hal/esp32h4/include/hal/timer_ll.h @@ -99,11 +99,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { (void)timer_num; // only one timer in each group uint8_t clk_id = 0; @@ -121,7 +121,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_sel = clk_id; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_sel = clk_id; @@ -131,14 +131,14 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { (void)timer_num; // only one timer in each group - if (hw == &TIMERG0) { + if (group_id == 0) { PCR.timergroup0_timer_clk_conf.tg0_timer_clk_en = en; } else { PCR.timergroup1_timer_clk_conf.tg1_timer_clk_en = en; diff --git a/components/hal/esp32p4/include/hal/timer_ll.h b/components/hal/esp32p4/include/hal/timer_ll.h index 0ed64074d7..5d5c203b2f 100644 --- a/components/hal/esp32p4/include/hal/timer_ll.h +++ b/components/hal/esp32p4/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -129,11 +129,11 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { uint8_t clk_id = 0; switch (clk_src) { @@ -150,7 +150,7 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, HAL_ASSERT(false); break; } - if (hw == &TIMERG0) { + if (group_id == 0) { if (timer_num == 0) { HP_SYS_CLKRST.peri_clk_ctrl20.reg_timergrp0_t0_src_sel = clk_id; } else { @@ -172,13 +172,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, /** * @brief Enable Timer Group (GPTimer) module clock * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void _timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void _timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { - if (hw == &TIMERG0) { + if (group_id == 0) { if (timer_num == 0) { HP_SYS_CLKRST.peri_clk_ctrl20.reg_timergrp0_t0_clk_en = en; } else { diff --git a/components/hal/esp32s2/include/hal/timer_ll.h b/components/hal/esp32s2/include/hal/timer_ll.h index cd79681177..05ac3323f7 100644 --- a/components/hal/esp32s2/include/hal/timer_ll.h +++ b/components/hal/esp32s2/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -76,12 +76,13 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); switch (clk_src) { case GPTIMER_CLK_SRC_APB: hw->hw_timer[timer_num].config.tx_use_xtal = 0; @@ -100,13 +101,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, * * @note This function is not optional, created for backward compatible. * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { - (void)hw; + (void)group_id; (void)timer_num; (void)en; } diff --git a/components/hal/esp32s3/include/hal/timer_ll.h b/components/hal/esp32s3/include/hal/timer_ll.h index 3f6f861b2d..7bdaad2eca 100644 --- a/components/hal/esp32s3/include/hal/timer_ll.h +++ b/components/hal/esp32s3/include/hal/timer_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -72,12 +72,13 @@ static inline void _timer_ll_reset_register(int group_id) /** * @brief Set clock source for timer * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer number in the group * @param clk_src Clock source */ -static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, gptimer_clock_source_t clk_src) +static inline void timer_ll_set_clock_source(int group_id, uint32_t timer_num, gptimer_clock_source_t clk_src) { + timg_dev_t *hw = TIMER_LL_GET_HW(group_id); switch (clk_src) { case GPTIMER_CLK_SRC_APB: hw->hw_timer[timer_num].config.tn_use_xtal = 0; @@ -96,13 +97,13 @@ static inline void timer_ll_set_clock_source(timg_dev_t *hw, uint32_t timer_num, * * @note This function is not optional, created for backward compatible. * - * @param hw Timer Group register base address + * @param group_id Group ID * @param timer_num Timer index in the group * @param en true to enable, false to disable */ -static inline void timer_ll_enable_clock(timg_dev_t *hw, uint32_t timer_num, bool en) +static inline void timer_ll_enable_clock(int group_id, uint32_t timer_num, bool en) { - (void)hw; + (void)group_id; (void)timer_num; (void)en; }