From d649ea96ce102ded13b23eb31d6196ca6ae08691 Mon Sep 17 00:00:00 2001 From: Nebojsa Cvetkovic Date: Tue, 18 Feb 2020 13:10:37 +0000 Subject: [PATCH 1/3] soc: Add missing gpio_periph.h header --- components/bootloader_support/src/esp32/bootloader_esp32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/components/bootloader_support/src/esp32/bootloader_esp32.c b/components/bootloader_support/src/esp32/bootloader_esp32.c index 4be56fe065..cf0572f407 100644 --- a/components/bootloader_support/src/esp32/bootloader_esp32.c +++ b/components/bootloader_support/src/esp32/bootloader_esp32.c @@ -26,6 +26,7 @@ #include "soc/cpu.h" #include "soc/dport_reg.h" #include "soc/efuse_reg.h" +#include "soc/gpio_periph.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" #include "soc/rtc.h" From f69f05ecd70ec4eb810a9d77c22a7edc6edd8d73 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Tue, 18 Feb 2020 14:51:32 +0100 Subject: [PATCH 2/3] bootloader: esp32s2: fix enabling custom console pins --- .../src/esp32s2/bootloader_esp32s2.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c index 6ad4a675c2..0c16ff1294 100644 --- a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c +++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c @@ -15,6 +15,7 @@ #include "sdkconfig.h" #include "bootloader_common.h" #include "soc/efuse_reg.h" +#include "soc/gpio_periph.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" #include "esp32s2/rom/efuse.h" @@ -237,15 +238,15 @@ static void bootloader_init_uart_console(void) uart_tx_switch(uart_num); // If console is attached to UART1 or if non-default pins are used, // need to reconfigure pins using GPIO matrix - if (uart_num != 0 || uart_tx_gpio != 1 || uart_rx_gpio != 3) { - // Change pin mode for GPIO1/3 from UART to GPIO - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO3); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO1); + if (uart_num != 0 || uart_tx_gpio != 43 || uart_rx_gpio != 44) { + // Change pin mode UART to GPIO + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_GPIO44); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_GPIO43); // Route GPIO signals to/from pins // (arrays should be optimized away by the compiler) - const uint32_t tx_idx_list[3] = {U0TXD_OUT_IDX, U1TXD_OUT_IDX, U2TXD_OUT_IDX}; - const uint32_t rx_idx_list[3] = {U0RXD_IN_IDX, U1RXD_IN_IDX, U2RXD_IN_IDX}; - const uint32_t uart_reset[3] = {DPORT_UART_RST, DPORT_UART1_RST, DPORT_UART2_RST}; + const uint32_t tx_idx_list[2] = {U0TXD_OUT_IDX, U1TXD_OUT_IDX}; + const uint32_t rx_idx_list[2] = {U0RXD_IN_IDX, U1RXD_IN_IDX}; + const uint32_t uart_reset[2] = {DPORT_UART_RST, DPORT_UART1_RST}; const uint32_t tx_idx = tx_idx_list[uart_num]; const uint32_t rx_idx = rx_idx_list[uart_num]; From 1cbb2287be3bd803062e0cff0a806bba19a484e4 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Tue, 18 Feb 2020 15:00:47 +0100 Subject: [PATCH 3/3] ci: add build test for custom console UART pins --- tools/test_apps/system/build_test/CMakeLists.txt | 6 ++++++ tools/test_apps/system/build_test/README.txt | 6 ++++++ tools/test_apps/system/build_test/main/CMakeLists.txt | 2 ++ tools/test_apps/system/build_test/main/test_main.c | 3 +++ tools/test_apps/system/build_test/sdkconfig.ci.custom_uart | 1 + 5 files changed, 18 insertions(+) create mode 100644 tools/test_apps/system/build_test/CMakeLists.txt create mode 100644 tools/test_apps/system/build_test/README.txt create mode 100644 tools/test_apps/system/build_test/main/CMakeLists.txt create mode 100644 tools/test_apps/system/build_test/main/test_main.c create mode 100644 tools/test_apps/system/build_test/sdkconfig.ci.custom_uart diff --git a/tools/test_apps/system/build_test/CMakeLists.txt b/tools/test_apps/system/build_test/CMakeLists.txt new file mode 100644 index 0000000000..a2718ab367 --- /dev/null +++ b/tools/test_apps/system/build_test/CMakeLists.txt @@ -0,0 +1,6 @@ +# The following lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.5) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(test_build) diff --git a/tools/test_apps/system/build_test/README.txt b/tools/test_apps/system/build_test/README.txt new file mode 100644 index 0000000000..9d824fa78e --- /dev/null +++ b/tools/test_apps/system/build_test/README.txt @@ -0,0 +1,6 @@ +This project is for testing if the application can be built with a particular sdkconfig setting. + +To add new configuration, create one more sdkconfig.ci.NAME file in this directory. +To make the configuration target-specific, add a CONFIG_IDF_TARGET="name" line. + +If you need to test for anything other than building, create another test project. diff --git a/tools/test_apps/system/build_test/main/CMakeLists.txt b/tools/test_apps/system/build_test/main/CMakeLists.txt new file mode 100644 index 0000000000..1df31fac80 --- /dev/null +++ b/tools/test_apps/system/build_test/main/CMakeLists.txt @@ -0,0 +1,2 @@ +idf_component_register(SRCS "test_main.c" + INCLUDE_DIRS ".") diff --git a/tools/test_apps/system/build_test/main/test_main.c b/tools/test_apps/system/build_test/main/test_main.c new file mode 100644 index 0000000000..cb05851571 --- /dev/null +++ b/tools/test_apps/system/build_test/main/test_main.c @@ -0,0 +1,3 @@ +void app_main(void) +{ +} diff --git a/tools/test_apps/system/build_test/sdkconfig.ci.custom_uart b/tools/test_apps/system/build_test/sdkconfig.ci.custom_uart new file mode 100644 index 0000000000..80ed1761ac --- /dev/null +++ b/tools/test_apps/system/build_test/sdkconfig.ci.custom_uart @@ -0,0 +1 @@ +CONFIG_ESP_CONSOLE_UART_CUSTOM=y