riscv: fix panic_reasons being an instance of enum, not type name

components/riscv/include/esp_private/panic_reason.h

@@ -1,19 +1,11 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #pragma once
 
-enum _panic_reasons {
+typedef enum {
     PANIC_RSN_NONE = 0,
     PANIC_RSN_INTWDT_CPU0,
 #if SOC_CPU_NUM > 1
@@ -24,4 +16,4 @@ enum _panic_reasons {
     PANIC_RSN_MEMPROT,
 #endif
     PANIC_RSN_COUNT
-} panic_reasons;
+} panic_reasons_t;

tools/ci/check_copyright_ignore.txt

@@ -1511,7 +1511,6 @@ components/pthread/test/test_pthread.c
 components/pthread/test/test_pthread_cond_var.c
 components/pthread/test/test_pthread_cxx.cpp
 components/pthread/test/test_pthread_local_storage.c
-components/riscv/include/esp_private/panic_reason.h
 components/riscv/include/riscv/csr.h
 components/riscv/include/riscv/encoding.h
 components/riscv/include/riscv/instruction_decode.h