From af78311975e30198f126243c1eaf2e7b2ed6ac32 Mon Sep 17 00:00:00 2001 From: suda-morris <362953310@qq.com> Date: Thu, 11 Jul 2019 10:47:17 +0800 Subject: [PATCH 1/4] ethernet: malloc hal together with driver context --- components/esp_eth/src/esp_eth_mac_esp32.c | 79 ++++++++++------------ components/esp_eth/test/test_emac.c | 2 +- components/soc/esp32/emac_hal.c | 2 +- 3 files changed, 39 insertions(+), 44 deletions(-) diff --git a/components/esp_eth/src/esp_eth_mac_esp32.c b/components/esp_eth/src/esp_eth_mac_esp32.c index 1c1fbcc90c..cb83e220ea 100644 --- a/components/esp_eth/src/esp_eth_mac_esp32.c +++ b/components/esp_eth/src/esp_eth_mac_esp32.c @@ -46,7 +46,7 @@ static const char *TAG = "emac_esp32"; typedef struct { esp_eth_mac_t parent; esp_eth_mediator_t *eth; - emac_hal_context_t *hal; + emac_hal_context_t hal; intr_handle_t intr_hdl; SemaphoreHandle_t rx_counting_sem; TaskHandle_t rx_task_hdl; @@ -72,15 +72,15 @@ static esp_err_t emac_esp32_write_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, { esp_err_t ret = ESP_OK; emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); - MAC_CHECK(!emac_hal_is_mii_busy(emac->hal), "phy is busy", err, ESP_ERR_INVALID_STATE); - emac_hal_set_phy_data(emac->hal, reg_value); - emac_hal_set_phy_cmd(emac->hal, phy_addr, phy_reg, true); + MAC_CHECK(!emac_hal_is_mii_busy(&emac->hal), "phy is busy", err, ESP_ERR_INVALID_STATE); + emac_hal_set_phy_data(&emac->hal, reg_value); + emac_hal_set_phy_cmd(&emac->hal, phy_addr, phy_reg, true); /* polling the busy flag */ uint32_t to = 0; bool busy = true; do { ets_delay_us(100); - busy = emac_hal_is_mii_busy(emac->hal); + busy = emac_hal_is_mii_busy(&emac->hal); to += 100; } while (busy && to < PHY_OPERATION_TIMEOUT_US); MAC_CHECK(!busy, "phy is busy", err, ESP_ERR_TIMEOUT); @@ -94,19 +94,19 @@ static esp_err_t emac_esp32_read_phy_reg(esp_eth_mac_t *mac, uint32_t phy_addr, esp_err_t ret = ESP_OK; MAC_CHECK(reg_value, "can't set reg_value to null", err, ESP_ERR_INVALID_ARG); emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); - MAC_CHECK(!emac_hal_is_mii_busy(emac->hal), "phy is busy", err, ESP_ERR_INVALID_STATE); - emac_hal_set_phy_cmd(emac->hal, phy_addr, phy_reg, false); + MAC_CHECK(!emac_hal_is_mii_busy(&emac->hal), "phy is busy", err, ESP_ERR_INVALID_STATE); + emac_hal_set_phy_cmd(&emac->hal, phy_addr, phy_reg, false); /* polling the busy flag */ uint32_t to = 0; bool busy = true; do { ets_delay_us(100); - busy = emac_hal_is_mii_busy(emac->hal); + busy = emac_hal_is_mii_busy(&emac->hal); to += 100; } while (busy && to < PHY_OPERATION_TIMEOUT_US); MAC_CHECK(!busy, "phy is busy", err, ESP_ERR_TIMEOUT); /* Store value */ - *reg_value = emac_hal_get_phy_data(emac->hal); + *reg_value = emac_hal_get_phy_data(&emac->hal); return ESP_OK; err: return ret; @@ -118,7 +118,7 @@ static esp_err_t emac_esp32_set_addr(esp_eth_mac_t *mac, uint8_t *addr) MAC_CHECK(addr, "can't set mac addr to null", err, ESP_ERR_INVALID_ARG); emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); memcpy(emac->addr, addr, 6); - emac_hal_set_address(emac->hal, emac->addr); + emac_hal_set_address(&emac->hal, emac->addr); return ESP_OK; err: return ret; @@ -142,11 +142,11 @@ static esp_err_t emac_esp32_set_link(esp_eth_mac_t *mac, eth_link_t link) switch (link) { case ETH_LINK_UP: MAC_CHECK(esp_intr_enable(emac->intr_hdl) == ESP_OK, "enable interrupt failed", err, ESP_FAIL); - emac_hal_start(emac->hal); + emac_hal_start(&emac->hal); break; case ETH_LINK_DOWN: MAC_CHECK(esp_intr_disable(emac->intr_hdl) == ESP_OK, "disable interrupt failed", err, ESP_FAIL); - emac_hal_stop(emac->hal); + emac_hal_stop(&emac->hal); break; default: MAC_CHECK(false, "unknown link status", err, ESP_ERR_INVALID_ARG); @@ -163,10 +163,10 @@ static esp_err_t emac_esp32_set_speed(esp_eth_mac_t *mac, eth_speed_t speed) emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); switch (speed) { case ETH_SPEED_10M: - emac_hal_set_speed(emac->hal, EMAC_SPEED_10M); + emac_hal_set_speed(&emac->hal, EMAC_SPEED_10M); break; case ETH_SPEED_100M: - emac_hal_set_speed(emac->hal, EMAC_SPEED_100M); + emac_hal_set_speed(&emac->hal, EMAC_SPEED_100M); break; default: MAC_CHECK(false, "unknown speed", err, ESP_ERR_INVALID_ARG); @@ -183,10 +183,10 @@ static esp_err_t emac_esp32_set_duplex(esp_eth_mac_t *mac, eth_duplex_t duplex) emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); switch (duplex) { case ETH_DUPLEX_HALF: - emac_hal_set_duplex(emac->hal, EMAC_DUPLEX_HALF); + emac_hal_set_duplex(&emac->hal, EMAC_DUPLEX_HALF); break; case ETH_DUPLEX_FULL: - emac_hal_set_duplex(emac->hal, EMAC_DUPLEX_FULL); + emac_hal_set_duplex(&emac->hal, EMAC_DUPLEX_FULL); break; default: MAC_CHECK(false, "unknown duplex", err, ESP_ERR_INVALID_ARG); @@ -200,7 +200,7 @@ err: static esp_err_t emac_esp32_set_promiscuous(esp_eth_mac_t *mac, bool enable) { emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); - emac_hal_set_promiscuous(emac->hal, enable); + emac_hal_set_promiscuous(&emac->hal, enable); return ESP_OK; } @@ -211,9 +211,9 @@ static esp_err_t emac_esp32_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t MAC_CHECK(buf, "can't set buf to null", err, ESP_ERR_INVALID_ARG); MAC_CHECK(length, "buf length can't be zero", err, ESP_ERR_INVALID_ARG); /* Check if the descriptor is owned by the Ethernet DMA (when 1) or CPU (when 0) */ - MAC_CHECK(emac_hal_get_tx_desc_owner(emac->hal) == EMAC_DMADESC_OWNER_CPU, + MAC_CHECK(emac_hal_get_tx_desc_owner(&emac->hal) == EMAC_DMADESC_OWNER_CPU, "CPU doesn't own the Tx Descriptor", err, ESP_ERR_INVALID_STATE); - emac_hal_transmit_frame(emac->hal, buf, length); + emac_hal_transmit_frame(&emac->hal, buf, length); return ESP_OK; err: return ret; @@ -224,7 +224,7 @@ static esp_err_t emac_esp32_receive(esp_eth_mac_t *mac, uint8_t *buf, uint32_t * esp_err_t ret = ESP_OK; emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); MAC_CHECK(buf && length, "can't set buf and length to null", err, ESP_ERR_INVALID_ARG); - *length = emac_hal_receive_frame(emac->hal, buf, &emac->frames_remain); + *length = emac_hal_receive_frame(&emac->hal, buf, &emac->frames_remain); return ESP_OK; err: return ret; @@ -274,7 +274,7 @@ static esp_err_t emac_esp32_init(esp_eth_mac_t *mac) /* enable peripheral clock */ periph_module_enable(PERIPH_EMAC_MODULE); /* enable clock, config gpio, etc */ - emac_hal_lowlevel_init(emac->hal); + emac_hal_lowlevel_init(&emac->hal); /* init gpio used by gpio */ emac_esp32_init_smi_gpio(); #if CONFIG_ETH_PHY_USE_RST @@ -284,27 +284,27 @@ static esp_err_t emac_esp32_init(esp_eth_mac_t *mac) #endif MAC_CHECK(eth->on_state_changed(eth, ETH_STATE_LLINIT, NULL) == ESP_OK, "lowlevel init failed", err, ESP_FAIL); /* software reset */ - emac_hal_reset(emac->hal); + emac_hal_reset(&emac->hal); uint32_t to = 0; for (to = 0; to < emac->sw_reset_timeout_ms / 10; to++) { - if (emac_hal_is_reset_done(emac->hal)) { + if (emac_hal_is_reset_done(&emac->hal)) { break; } vTaskDelay(pdMS_TO_TICKS(10)); } MAC_CHECK(to < emac->sw_reset_timeout_ms / 10, "reset timeout", err, ESP_ERR_TIMEOUT); /* set smi clock */ - emac_hal_set_csr_clock_range(emac->hal); + emac_hal_set_csr_clock_range(&emac->hal); /* reset descriptor chain */ - emac_hal_reset_desc_chain(emac->hal); + emac_hal_reset_desc_chain(&emac->hal); /* init mac registers by default */ - emac_hal_init_mac_default(emac->hal); + emac_hal_init_mac_default(&emac->hal); /* init dma registers by default */ - emac_hal_init_dma_default(emac->hal); + emac_hal_init_dma_default(&emac->hal); /* get emac address from efuse */ MAC_CHECK(esp_read_mac(emac->addr, ESP_MAC_ETH) == ESP_OK, "fetch ethernet mac address failed", err, ESP_FAIL); /* set MAC address to emac register */ - emac_hal_set_address(emac->hal, emac->addr); + emac_hal_set_address(&emac->hal, emac->addr); return ESP_OK; err: eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL); @@ -319,7 +319,7 @@ static esp_err_t emac_esp32_deinit(esp_eth_mac_t *mac) #if CONFIG_ETH_PHY_USE_RST gpio_set_level(CONFIG_ETH_PHY_RST_GPIO, 0); #endif - emac_hal_stop(emac->hal); + emac_hal_stop(&emac->hal); eth->on_state_changed(eth, ETH_STATE_DEINIT, NULL); periph_module_disable(PERIPH_EMAC_MODULE); return ESP_OK; @@ -333,13 +333,12 @@ static esp_err_t emac_esp32_del(esp_eth_mac_t *mac) vSemaphoreDelete(emac->rx_counting_sem); int i = 0; for (i = 0; i < CONFIG_ETH_DMA_RX_BUFFER_NUM; i++) { - free(emac->hal->rx_buf[i]); + free(emac->hal.rx_buf[i]); } for (i = 0; i < CONFIG_ETH_DMA_TX_BUFFER_NUM; i++) { - free(emac->hal->tx_buf[i]); + free(emac->hal.tx_buf[i]); } - free(emac->hal->descriptors); - free(emac->hal); + free(emac->hal.descriptors); free(emac); return ESP_OK; } @@ -355,8 +354,6 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config) CONFIG_ETH_DMA_TX_BUFFER_NUM * sizeof(eth_dma_tx_descriptor_t); void *descriptors = heap_caps_calloc(1, desc_size, MALLOC_CAP_DMA); MAC_CHECK(descriptors, "calloc descriptors failed", err_desc, NULL); - emac->hal = (emac_hal_context_t *)calloc(1, sizeof(emac_hal_context_t)); - MAC_CHECK(emac->hal, "calloc emac hal failed", err_hal, NULL); int i = 0; /* alloc memory for ethernet dma buffer */ for (i = 0; i < CONFIG_ETH_DMA_RX_BUFFER_NUM; i++) { @@ -387,7 +384,7 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config) goto err_buffer; } /* initialize hal layer driver */ - emac_hal_init(emac->hal, descriptors, emac->rx_buf, emac->tx_buf); + emac_hal_init(&emac->hal, descriptors, emac->rx_buf, emac->tx_buf); emac->sw_reset_timeout_ms = config->sw_reset_timeout_ms; emac->parent.set_mediator = emac_esp32_set_mediator; emac->parent.init = emac_esp32_init; @@ -427,8 +424,6 @@ err_intr: free(emac->rx_buf[i]); } err_buffer: - free(emac->hal); -err_hal: free(descriptors); err_desc: free(emac); @@ -438,8 +433,8 @@ err: void emac_hal_rx_complete_cb(void *arg) { - emac_hal_context_t **hal_addr = (emac_hal_context_t **)arg; - emac_esp32_t *emac = __containerof(hal_addr, emac_esp32_t, hal); + emac_hal_context_t *hal = (emac_hal_context_t *)arg; + emac_esp32_t *emac = __containerof(hal, emac_esp32_t, hal); BaseType_t high_task_wakeup; /* send message to rx thread */ xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); @@ -450,8 +445,8 @@ void emac_hal_rx_complete_cb(void *arg) void emac_hal_rx_unavail_cb(void *arg) { - emac_hal_context_t **hal_addr = (emac_hal_context_t **)arg; - emac_esp32_t *emac = __containerof(hal_addr, emac_esp32_t, hal); + emac_hal_context_t *hal = (emac_hal_context_t *)arg; + emac_esp32_t *emac = __containerof(hal, emac_esp32_t, hal); BaseType_t high_task_wakeup; /* send message to rx thread */ xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); diff --git a/components/esp_eth/test/test_emac.c b/components/esp_eth/test/test_emac.c index 141bf3e1da..2ebe98b023 100644 --- a/components/esp_eth/test/test_emac.c +++ b/components/esp_eth/test/test_emac.c @@ -76,7 +76,7 @@ TEST_CASE("esp32 emac io test", "[ethernet][ignore]") TEST_CASE("ethernet tcpip_adapter", "[ethernet][ignore]") { - tcpip_adapter_init(); + test_case_uses_tcpip(); TEST_ESP_OK(esp_event_loop_create_default()); TEST_ESP_OK(tcpip_adapter_set_default_eth_handlers()); TEST_ESP_OK(esp_event_handler_register(ETH_EVENT, ESP_EVENT_ANY_ID, ð_event_handler, NULL)); diff --git a/components/soc/esp32/emac_hal.c b/components/soc/esp32/emac_hal.c index 4722ee4ecf..509b66b502 100644 --- a/components/soc/esp32/emac_hal.c +++ b/components/soc/esp32/emac_hal.c @@ -521,7 +521,7 @@ uint32_t emac_hal_receive_frame(emac_hal_context_t *hal, uint8_t *buf, uint32_t void emac_hal_isr(void *arg) { - emac_hal_context_t *hal = *(emac_hal_context_t **)arg; + emac_hal_context_t *hal = (emac_hal_context_t *)arg; typeof(hal->dma_regs->dmastatus) dma_status = hal->dma_regs->dmastatus; /* DMA Normal Interrupt */ if (dma_status.norm_int_summ) { From cfbf8c5d07d0ece7adbe5eb32c97410223491f16 Mon Sep 17 00:00:00 2001 From: suda-morris <362953310@qq.com> Date: Thu, 11 Jul 2019 11:01:51 +0800 Subject: [PATCH 2/4] ethernet: task yield at the end of isr handler --- components/esp_eth/linker.lf | 1 + components/esp_eth/src/esp_eth_mac_esp32.c | 22 +++++++++++++++++----- 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/components/esp_eth/linker.lf b/components/esp_eth/linker.lf index 69f864d8d6..64969708d9 100644 --- a/components/esp_eth/linker.lf +++ b/components/esp_eth/linker.lf @@ -7,5 +7,6 @@ entries: esp_eth_mac_esp32:emac_hal_rx_complete_cb (noflash_text) esp_eth_mac_esp32:emac_hal_rx_early_cb (noflash_text) esp_eth_mac_esp32:emac_hal_rx_unavail_cb (noflash_text) + esp_eth_mac_esp32:emac_esp32_isr_handler (noflash_text) if ETH_SPI_ETHERNET_DM9051 = y: esp_eth_mac_dm9051:dm9051_isr_handler (noflash_text) diff --git a/components/esp_eth/src/esp_eth_mac_esp32.c b/components/esp_eth/src/esp_eth_mac_esp32.c index cb83e220ea..cea8868a3b 100644 --- a/components/esp_eth/src/esp_eth_mac_esp32.c +++ b/components/esp_eth/src/esp_eth_mac_esp32.c @@ -55,6 +55,7 @@ typedef struct { uint8_t addr[6]; uint8_t *rx_buf[CONFIG_ETH_DMA_RX_BUFFER_NUM]; uint8_t *tx_buf[CONFIG_ETH_DMA_TX_BUFFER_NUM]; + bool isr_need_yield; } emac_esp32_t; static esp_err_t emac_esp32_set_mediator(esp_eth_mac_t *mac, esp_eth_mediator_t *eth) @@ -343,6 +344,17 @@ static esp_err_t emac_esp32_del(esp_eth_mac_t *mac) return ESP_OK; } +void emac_esp32_isr_handler(void *args) +{ + emac_hal_context_t *hal = (emac_hal_context_t *)args; + emac_esp32_t *emac = __containerof(hal, emac_esp32_t, hal); + emac_hal_isr(args); + if (emac->isr_need_yield) { + emac->isr_need_yield = false; + portYIELD_FROM_ISR(); + } +} + esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config) { esp_eth_mac_t *ret = NULL; @@ -401,7 +413,7 @@ esp_eth_mac_t *esp_eth_mac_new_esp32(const eth_mac_config_t *config) emac->parent.transmit = emac_esp32_transmit; emac->parent.receive = emac_esp32_receive; /* Interrupt configuration */ - MAC_CHECK(esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_hal_isr, + MAC_CHECK(esp_intr_alloc(ETS_ETH_MAC_INTR_SOURCE, ESP_INTR_FLAG_IRAM, emac_esp32_isr_handler, &emac->hal, &(emac->intr_hdl)) == ESP_OK, "alloc emac interrupt failed", err_intr, NULL); /* create counting semaphore */ @@ -438,8 +450,8 @@ void emac_hal_rx_complete_cb(void *arg) BaseType_t high_task_wakeup; /* send message to rx thread */ xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); - if (high_task_wakeup != pdFALSE) { - portYIELD_FROM_ISR(); + if (high_task_wakeup == pdTRUE) { + emac->isr_need_yield = true; } } @@ -450,7 +462,7 @@ void emac_hal_rx_unavail_cb(void *arg) BaseType_t high_task_wakeup; /* send message to rx thread */ xSemaphoreGiveFromISR(emac->rx_counting_sem, &high_task_wakeup); - if (high_task_wakeup != pdFALSE) { - portYIELD_FROM_ISR(); + if (high_task_wakeup == pdTRUE) { + emac->isr_need_yield = true; } } From 97ad2bcb86eb7328229bf3d2a44b4a8be39a1238 Mon Sep 17 00:00:00 2001 From: Tomer Shefler Date: Thu, 11 Jul 2019 21:01:28 +0300 Subject: [PATCH 3/4] ethernet: support giving 50mhz rmii clock with both 40mhz and 26 mhz rtc xtal Merges https://github.com/espressif/esp-idf/pull/3769 Closes https://github.com/espressif/esp-idf/pull/3704 --- components/soc/esp32/emac_hal.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/components/soc/esp32/emac_hal.c b/components/soc/esp32/emac_hal.c index 509b66b502..121bc53269 100644 --- a/components/soc/esp32/emac_hal.c +++ b/components/soc/esp32/emac_hal.c @@ -20,6 +20,34 @@ #define ETH_CRC_LENGTH (4) +#if CONFIG_ETH_RMII_CLK_OUTPUT +static void emac_config_apll_clock(void) +{ + /* apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)/((o_div + 2) * 2) */ + rtc_xtal_freq_t rtc_xtal_freq = rtc_clk_xtal_freq_get(); + switch (rtc_xtal_freq) { + case RTC_XTAL_FREQ_40M: // Recommended + /* 50 MHz = 40MHz * (4 + 6) / (2 * (2 + 2) = 50.000 */ + /* sdm0 = 0, sdm1 = 0, sdm2 = 6, o_div = 2 */ + rtc_clk_apll_enable(true, 0, 0, 6, 2); + break; + case RTC_XTAL_FREQ_26M: + /* 50 MHz = 26MHz * (4 + 15 + 118 / 256 + 39/65536) / ((3 + 2) * 2) = 49.999992 */ + /* sdm0 = 39, sdm1 = 118, sdm2 = 15, o_div = 3 */ + rtc_clk_apll_enable(true, 39, 118, 15, 3); + break; + case RTC_XTAL_FREQ_24M: + /* 50 MHz = 24MHz * (4 + 12 + 255 / 256 + 255/65536) / ((2 + 2) * 2) = 49.499977 */ + /* sdm0 = 255, sdm1 = 255, sdm2 = 12, o_div = 2 */ + rtc_clk_apll_enable(true, 255, 255, 12, 2); + break; + default: // Assume we have a 40M xtal + rtc_clk_apll_enable(true, 0, 0, 6, 2); + break; + } +} +#endif + void emac_hal_init(emac_hal_context_t *hal, void *descriptors, uint8_t **rx_buf, uint8_t **tx_buf) { @@ -91,10 +119,7 @@ void emac_hal_lowlevel_init(emac_hal_context_t *hal) hal->ext_regs->ex_clk_ctrl.ext_en = 0; hal->ext_regs->ex_clk_ctrl.int_en = 1; hal->ext_regs->ex_oscclk_conf.clk_sel = 0; - /* apll_freq = xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536)/((o_div + 2) * 2) */ - /* 50 MHz = 40MHz * (4 + 6) / (2 * (2 + 2) = 400MHz / 8 */ - /* sdm2 = 6, sdm1 = 0, sdm0 = 0, o_div = 2 */ - rtc_clk_apll_enable(true, 0, 0, 6, 2); + emac_config_apll_clock(); hal->ext_regs->ex_clkout_conf.div_num = 0; hal->ext_regs->ex_clkout_conf.h_div_num = 0; #if CONFIG_ETH_RMII_CLK_OUTPUT_GPIO0 From 018de8101fb8356dd5ed17a02535d0f78673a5bc Mon Sep 17 00:00:00 2001 From: suda-morris <362953310@qq.com> Date: Fri, 12 Jul 2019 17:58:45 +0800 Subject: [PATCH 4/4] ethernet: can build without enable esp32 emac Closes https://github.com/espressif/esp-idf/issues/3770 --- components/esp_eth/CMakeLists.txt | 2 +- components/esp_eth/component.mk | 2 +- components/soc/esp32/component.mk | 4 ++++ components/soc/esp32/sources.cmake | 2 +- components/soc/linker.lf | 13 +++++++------ 5 files changed, 14 insertions(+), 9 deletions(-) diff --git a/components/esp_eth/CMakeLists.txt b/components/esp_eth/CMakeLists.txt index 7f41a8409e..3829df1885 100644 --- a/components/esp_eth/CMakeLists.txt +++ b/components/esp_eth/CMakeLists.txt @@ -4,7 +4,7 @@ set(esp_eth_srcs "src/esp_eth.c" "src/esp_eth_phy_lan8720.c" "src/esp_eth_phy_rtl8201.c") -if(CONFIG_IDF_TARGET_ESP32) +if(CONFIG_ETH_USE_ESP32_EMAC) list(APPEND esp_eth_srcs "src/esp_eth_mac_esp32.c") endif() diff --git a/components/esp_eth/component.mk b/components/esp_eth/component.mk index 2a5ba23b38..3a768fdf8c 100644 --- a/components/esp_eth/component.mk +++ b/components/esp_eth/component.mk @@ -5,7 +5,7 @@ COMPONENT_ADD_INCLUDEDIRS := include COMPONENT_SRCDIRS := src COMPONENT_ADD_LDFRAGMENTS += linker.lf -ifndef CONFIG_IDF_TARGET_ESP32 +ifndef CONFIG_ETH_USE_ESP32_EMAC COMPONENT_OBJEXCLUDE += src/esp_eth_mac_esp32.o endif diff --git a/components/soc/esp32/component.mk b/components/soc/esp32/component.mk index 83a2ef722e..52c33c8d24 100644 --- a/components/soc/esp32/component.mk +++ b/components/soc/esp32/component.mk @@ -1 +1,5 @@ +ifndef CONFIG_ETH_USE_ESP32_EMAC + COMPONENT_OBJEXCLUDE += esp32/emac_hal.o +endif + esp32/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion diff --git a/components/soc/esp32/sources.cmake b/components/soc/esp32/sources.cmake index ea4201cc0d..a5471b6b36 100644 --- a/components/soc/esp32/sources.cmake +++ b/components/soc/esp32/sources.cmake @@ -13,7 +13,7 @@ set(SOC_SRCS "cpu_util.c" "soc_memory_layout.c" "spi_periph.c") -if(NOT BOOTLOADER_BUILD) +if(NOT BOOTLOADER_BUILD AND CONFIG_ETH_USE_ESP32_EMAC) list(APPEND SOC_SRCS "emac_hal.c") endif() diff --git a/components/soc/linker.lf b/components/soc/linker.lf index 2d0918a8bb..21aa0a0331 100644 --- a/components/soc/linker.lf +++ b/components/soc/linker.lf @@ -14,9 +14,10 @@ entries: spi_slave_hal_iram (noflash_text) spi_flash_hal_iram (noflash) lldesc (noflash_text) - emac_hal:emac_hal_isr (noflash_text) - emac_hal:emac_hal_tx_complete_cb (noflash_text) - emac_hal:emac_hal_tx_unavail_cb (noflash_text) - emac_hal:emac_hal_rx_complete_cb (noflash_text) - emac_hal:emac_hal_rx_early_cb (noflash_text) - emac_hal:emac_hal_rx_unavail_cb (noflash_text) + if ETH_USE_ESP32_EMAC = y: + emac_hal:emac_hal_isr (noflash_text) + emac_hal:emac_hal_tx_complete_cb (noflash_text) + emac_hal:emac_hal_tx_unavail_cb (noflash_text) + emac_hal:emac_hal_rx_complete_cb (noflash_text) + emac_hal:emac_hal_rx_early_cb (noflash_text) + emac_hal:emac_hal_rx_unavail_cb (noflash_text)