diff --git a/components/esp_system/port/soc/esp32p4/clk.c b/components/esp_system/port/soc/esp32p4/clk.c
index bb9a6e0aa5..4d98082872 100644
--- a/components/esp_system/port/soc/esp32p4/clk.c
+++ b/components/esp_system/port/soc/esp32p4/clk.c
@@ -54,6 +54,7 @@
 #include "hal/usb_serial_jtag_ll.h"
 #include "hal/usb_utmi_ll.h"
 #include "hal/wdt_hal.h"
+#include "hal/bitscrambler_ll.h"
 
 #include "esp_private/esp_modem_clock.h"
 #include "esp_private/esp_sleep_internal.h"
@@ -253,9 +254,9 @@ __attribute__((weak)) void esp_perip_clk_init(void)
         _pau_ll_enable_bus_clock(false);
         _parlio_ll_enable_bus_clock(0, false);
         _etm_ll_enable_bus_clock(0, false);
-        REG_CLR_BIT(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN);
-        REG_CLR_BIT(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN);
-        REG_CLR_BIT(HP_SYS_CLKRST_SOC_CLK_CTRL1_REG, HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN);
+        _bitscrambler_ll_set_bus_clock_sys_enable(false);
+        _bitscrambler_ll_set_bus_clock_rx_enable(false);
+        _bitscrambler_ll_set_bus_clock_tx_enable(false);
 
 // Non-Console UART
 #if CONFIG_ESP_CONSOLE_UART_NUM != 0
diff --git a/components/hal/esp32p4/include/hal/bitscrambler_ll.h b/components/hal/esp32p4/include/hal/bitscrambler_ll.h
new file mode 100644
index 0000000000..33c6276c9e
--- /dev/null
+++ b/components/hal/esp32p4/include/hal/bitscrambler_ll.h
@@ -0,0 +1,343 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#pragma once
+
+#include <limits.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "soc/bitscrambler_struct.h"
+#include "hal/bitscrambler_types.h"
+#include "soc/hp_sys_clkrst_struct.h"
+#include "soc/hp_system_struct.h"
+#include "hal/misc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BITSCRAMBLER_LL_GET_HW(num)      (((num) == 0) ? (&BITSCRAMBLER) : NULL)
+
+/**
+ * @brief Select peripheral BitScrambler is attached to
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param peri Peripheral to select, should pick the value from soc/bitscrambler_peri_select.h
+ */
+static inline void bitscrambler_ll_select_peripheral(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, int peri)
+{
+    if (dir == BITSCRAMBLER_DIR_TX) {
+        HP_SYSTEM.bitscrambler_peri_sel.bitscrambler_peri_tx_sel = peri;
+    } else { // RX
+        HP_SYSTEM.bitscrambler_peri_sel.bitscrambler_peri_rx_sel = peri;
+    }
+}
+
+/**
+ * @brief Enable the BitScrambler
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ */
+static inline void bitscrambler_ll_enable(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    hw->ctrl[dir].ena = 1;
+}
+
+/**
+ * @brief Disable the BitScrambler
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ */
+static inline void bitscrambler_ll_disable(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    hw->ctrl[dir].ena = 0;
+}
+
+
+/**
+ * @brief Write a word to the instruction memory
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param inst_idx Instruction to write to
+ * @param word_idx Word within the instruction to write to
+ * @param data Data to write
+ */
+static inline void bitscrambler_ll_instmem_write(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, int inst_idx, int word_idx, uint32_t data)
+{
+    hw->inst_cfg[dir].cfg0.inst_idx = inst_idx;
+    hw->inst_cfg[dir].cfg0.inst_pos = word_idx;
+    hw->inst_cfg[dir].cfg1.inst = data;
+}
+
+/**
+ * @brief Read a word from the instruction memory
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param inst_idx Instruction to write to
+ * @param word_idx Word within the instruction to write to
+ *
+ * @returns Word read from instruction memory
+ */
+static inline uint32_t bitscrambler_ll_instmem_read(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, int inst_idx, int word_idx)
+{
+    hw->inst_cfg[dir].cfg0.inst_idx = inst_idx;
+    hw->inst_cfg[dir].cfg0.inst_pos = word_idx;
+    return hw->inst_cfg[dir].cfg1.inst;
+}
+
+/**
+ * @brief Write a word to LUT memory
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param word_idx Word within the LUT to write to
+ * @param data Data to write
+ */
+static inline void bitscrambler_ll_lutmem_write(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, int word_idx, uint32_t data)
+{
+    hw->lut_cfg[dir].cfg0.lut_idx = word_idx;
+    hw->lut_cfg[dir].cfg1.lut = data;
+}
+
+/**
+ * @brief Set width of LUT memory (as seen by Bitscrambler, not by host)
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param width Width selection
+ */
+static inline void bitscrambler_ll_set_lut_width(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_lut_width_t width)
+{
+    hw->lut_cfg[dir].cfg0.lut_mode = width;
+}
+
+/**
+ * @brief Get width of LUT memory
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ */
+static inline int bitscrambler_ll_get_lut_width(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    return hw->lut_cfg[dir].cfg0.lut_mode;
+}
+
+/**
+ * @brief Enable loopback mode, where the RX BitScrambler is disabled and the TX BitScrambler loops
+ * back to the receive DMA path to memory.
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param en True if loopback mode is enabled; false otherwise
+ */
+static inline void bitscrambler_ll_enable_loopback(bitscrambler_dev_t *hw, bool en)
+{
+    hw->sys.loop_mode = en ? 1 : 0;
+}
+
+/**
+ * @brief Set condition-checking mode
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param mode Mode to set
+ */
+static inline void bitscrambler_ll_set_cond_mode(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_cond_mode_t mode)
+{
+    hw->ctrl[dir].cond_mode = mode;
+}
+
+/**
+ * @brief Set prefetch mode
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param mode Mode to set
+ */
+static inline void bitscrambler_ll_set_prefetch_mode(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_prefetch_mode_t mode)
+{
+    hw->ctrl[dir].fetch_mode = mode;
+}
+
+/**
+ * @brief Set EOF mode
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param mode Mode to set
+ */
+static inline void bitscrambler_ll_set_eof_mode(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_eof_mode_t mode)
+{
+    hw->ctrl[dir].eof_mode = mode;
+}
+
+/**
+ * @brief Set mode of dummy-reading after EOF
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param mode Mode to set
+ */
+static inline void bitscrambler_ll_set_dummy_mode(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_dummy_mode_t mode)
+{
+    hw->ctrl[dir].rd_dummy = mode;
+}
+
+/**
+ * @brief Set halting mode
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param mode Mode to set
+ */
+static inline void bitscrambler_ll_set_halt_mode(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_halt_mode_t mode)
+{
+    hw->ctrl[dir].halt_mode = mode;
+}
+
+/**
+ * @brief Set amount of bits to ignore after EOF
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param bitcount Number of bits to ignore
+ */
+static inline void bitscrambler_ll_set_tailing_bits(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, int bitcount)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->tailing_bits[dir], tailing_bits, bitcount);
+}
+
+/**
+ * @brief Reset BitScrambler FIFO
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ */
+static inline void bitscrambler_ll_reset_fifo(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    hw->ctrl[dir].fifo_rst = 1;
+    hw->ctrl[dir].fifo_rst = 0;
+}
+
+/**
+ * @brief Clear trace of EOF counts
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ */
+static inline void bitscrambler_ll_clear_eof_trace(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    hw->state[dir].eof_trace_clr = 1;
+    hw->state[dir].eof_trace_clr = 0;
+}
+
+/**
+ * @brief Set state of BitScrambler
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ * @param state One of BITSCRAMBLER_SET_STATE_[RUN|HALT|PAUSE]. Note the WAIT state cannot be set externally.
+ */
+static inline void bitscrambler_ll_set_state(bitscrambler_dev_t *hw, bitscrambler_direction_t dir, bitscrambler_set_state_t state)
+{
+    hw->ctrl[dir].pause = (state == BITSCRAMBLER_SET_STATE_PAUSE) ? 1 : 0;
+    hw->ctrl[dir].halt = (state == BITSCRAMBLER_SET_STATE_HALT) ? 1 : 0;
+}
+
+/**
+ * @brief Return current BitScrambler state
+ *
+ * @param hw BitScrambler hardware instance address.
+ * @param dir Direction, BITSCRAMBLER_DIR_TX or BITSCRAMBLER_DIR_RX
+ *
+ * @returns one of BITSCRAMBLER_STATE_* values
+ */
+static inline bitscrambler_state_t bitscrambler_ll_current_state(bitscrambler_dev_t *hw, bitscrambler_direction_t dir)
+{
+    if (hw->state[dir].in_idle) {
+        return BITSCRAMBLER_STATE_IDLE;
+    }
+    if (hw->state[dir].in_run) {
+        return BITSCRAMBLER_STATE_RUN;
+    }
+    if (hw->state[dir].in_wait) {
+        return BITSCRAMBLER_STATE_WAIT;
+    }
+    if (hw->state[dir].in_pause) {
+        return BITSCRAMBLER_STATE_PAUSED;
+    }
+    return BITSCRAMBLER_STATE_UNKNOWN;
+}
+
+/**
+ * @brief Enable the bus clock for BitScrambler module
+ */
+static inline void _bitscrambler_ll_set_bus_clock_sys_enable(bool enable)
+{
+    HP_SYS_CLKRST.soc_clk_ctrl1.reg_bitscrambler_sys_clk_en = enable;
+}
+
+/**
+ * @brief Enable the bus clock for RX BitScrambler module
+ */
+static inline void _bitscrambler_ll_set_bus_clock_rx_enable(bool enable)
+{
+    HP_SYS_CLKRST.soc_clk_ctrl1.reg_bitscrambler_rx_sys_clk_en = enable;
+}
+
+/**
+ * @brief Enable the bus clock for TX BitScrambler module
+ */
+static inline void _bitscrambler_ll_set_bus_clock_tx_enable(bool enable)
+{
+    HP_SYS_CLKRST.soc_clk_ctrl1.reg_bitscrambler_tx_sys_clk_en = enable;
+}
+
+/**
+ * @brief Reset the BitScrambler module
+ */
+static inline void _bitscrambler_ll_reset_sys(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler = 0;
+}
+
+/**
+ * @brief Reset the BitScrambler RX module
+ */
+static inline void _bitscrambler_ll_reset_rx(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler_rx = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler_rx = 0;
+}
+
+/**
+ * @brief Reset the BitScrambler TX module
+ */
+static inline void _bitscrambler_ll_reset_tx(void)
+{
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler_tx = 1;
+    HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_bitscrambler_tx = 0;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_RC_ATOMIC_ENV variable in advance
+#define bitscrambler_ll_set_bus_clock_sys_enable(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_set_bus_clock_sys_enable(__VA_ARGS__)
+#define bitscrambler_ll_set_bus_clock_rx_enable(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_set_bus_clock_rx_enable(__VA_ARGS__)
+#define bitscrambler_ll_set_bus_clock_tx_enable(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_set_bus_clock_tx_enable(__VA_ARGS__)
+
+#define bitscrambler_ll_reset_sys(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_reset_sys(__VA_ARGS__)
+#define bitscrambler_ll_reset_rx(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_reset_rx(__VA_ARGS__)
+#define bitscrambler_ll_reset_tx(...) (void)__DECLARE_RCC_RC_ATOMIC_ENV; _bitscrambler_ll_reset_tx(__VA_ARGS__)
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/hal/include/hal/bitscrambler_hal.h b/components/hal/include/hal/bitscrambler_hal.h
new file mode 100644
index 0000000000..d0459ee550
--- /dev/null
+++ b/components/hal/include/hal/bitscrambler_hal.h
@@ -0,0 +1,15 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/hal/include/hal/bitscrambler_types.h b/components/hal/include/hal/bitscrambler_types.h
new file mode 100644
index 0000000000..25f0f8421b
--- /dev/null
+++ b/components/hal/include/hal/bitscrambler_types.h
@@ -0,0 +1,93 @@
+/*
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief BitScrambler transport direction
+ */
+typedef enum {
+    BITSCRAMBLER_DIR_TX = 0,    /*!< Transmit, so mem to device (or mem to mem in loopback mode) */
+    BITSCRAMBLER_DIR_RX = 1     /*!< Receive, so device to memory */
+} bitscrambler_direction_t;
+
+/**
+ * @brief BitScrambler LUT (look up table) width
+ */
+typedef enum {
+    BITSCRAMBLER_LUT_WIDTH_8BIT = 0,  /*!< 8-bit LUT */
+    BITSCRAMBLER_LUT_WIDTH_16BIT = 1, /*!< 16-bit LUT */
+    BITSCRAMBLER_LUT_WIDTH_32BIT = 2, /*!< 32-bit LUT */
+} bitscrambler_lut_width_t;
+
+
+/**
+ * @brief EOF signal generating mode of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_EOF_MODE_READ = 0,  /*!< EOF is counted by reading the source FIFO */
+    BITSCRAMBLER_EOF_MODE_WRITE = 1, /*!< EOF is counted by writing the destination FIFO */
+} bitscrambler_eof_mode_t;
+
+/**
+ * @brief Condition mode of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_COND_MODE_LESSTHAN = 0, /*!< Use "<=" to generate the condition */
+    BITSCRAMBLER_COND_MODE_NOTEQUAL = 1, /*!< Use "!=" to generate the condition */
+} bitscrambler_cond_mode_t;
+
+/**
+ * @brief Prefetch mode of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_PREFETCH_ENABLED = 0,  /*!< Hardware prefetch is enabled */
+    BITSCRAMBLER_PREFETCH_DISABLED = 1, /*!< Hardware prefetch is disabled, but the bitscrambler instructions can still do the prefetch */
+} bitscrambler_prefetch_mode_t;
+
+/**
+ * @brief Halt mode of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_HALT_WAIT_WRITES = 0,   /*!< Wait data write back */
+    BITSCRAMBLER_HALT_IGNORE_WRITES = 1, /*!< Ignore write data back */
+} bitscrambler_halt_mode_t;
+
+/**
+ * @brief Dummy mode of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_DUMMY_MODE_HALT = 0,  /*!< Halt and wait the read data */
+    BITSCRAMBLER_DUMMY_MODE_DUMMY = 1, /*!< Ignore the read data */
+} bitscrambler_dummy_mode_t;
+
+/**
+ * @brief Commands to set the state of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_SET_STATE_RUN,   /*!< Run */
+    BITSCRAMBLER_SET_STATE_HALT,  /*!< Halt */
+    BITSCRAMBLER_SET_STATE_PAUSE, /*!< Pause */
+} bitscrambler_set_state_t;
+
+/**
+ * @brief Status of bitscrambler
+ */
+typedef enum {
+    BITSCRAMBLER_STATE_IDLE,   /*!< Idle (halt) */
+    BITSCRAMBLER_STATE_RUN,    /*!< Running */
+    BITSCRAMBLER_STATE_WAIT,   /*!< Waiting data write back */
+    BITSCRAMBLER_STATE_PAUSED, /*!< Paused */
+    BITSCRAMBLER_STATE_UNKNOWN /*!< Invalid, should never be returned */
+} bitscrambler_state_t;
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/components/soc/esp32p4/include/soc/bitscrambler_peri_select.h b/components/soc/esp32p4/include/soc/bitscrambler_peri_select.h
new file mode 100644
index 0000000000..f43c633086
--- /dev/null
+++ b/components/soc/esp32p4/include/soc/bitscrambler_peri_select.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+/*
+ * @brief BitScrambler attachment targets
+ * Note that these are the values written to HP_SYSTEM_BITSCRAMBLER_PERI_SEL_REG.
+ */
+
+#define SOC_BITSCRAMBLER_ATTACH_LCD_CAM 0
+#define SOC_BITSCRAMBLER_ATTACH_GPSPI2  1
+#define SOC_BITSCRAMBLER_ATTACH_GPSPI3  2
+#define SOC_BITSCRAMBLER_ATTACH_PARL_IO 3
+#define SOC_BITSCRAMBLER_ATTACH_AES     4
+#define SOC_BITSCRAMBLER_ATTACH_SHA     5
+#define SOC_BITSCRAMBLER_ATTACH_ADC     6
+#define SOC_BITSCRAMBLER_ATTACH_I2S0    7
+#define SOC_BITSCRAMBLER_ATTACH_I2S1    8
+#define SOC_BITSCRAMBLER_ATTACH_I2S2    9
+#define SOC_BITSCRAMBLER_ATTACH_I3C_MST 10
+#define SOC_BITSCRAMBLER_ATTACH_UHCI    11
+#define SOC_BITSCRAMBLER_ATTACH_RMT     12
+
+#define SOC_BITSCRAMBLER_ATTACH_MAX     12
diff --git a/components/soc/esp32p4/include/soc/periph_defs.h b/components/soc/esp32p4/include/soc/periph_defs.h
index 41f59d69a3..7c7a6b8d9c 100644
--- a/components/soc/esp32p4/include/soc/periph_defs.h
+++ b/components/soc/esp32p4/include/soc/periph_defs.h
@@ -69,7 +69,7 @@ typedef enum {
     PERIPH_UHCI_MODULE,
     PERIPH_PCNT_MODULE,
     PERIPH_ASSIST_DEBUG_MODULE,
-
+    PERIPH_BITSCRAMBLER_MODULE,
     /* LP peripherals */
     PERIPH_LP_I2C0_MODULE,
     PERIPH_LP_UART0_MODULE,
diff --git a/components/soc/esp32p4/ld/esp32p4.peripherals.ld b/components/soc/esp32p4/ld/esp32p4.peripherals.ld
index e82a48159e..3c3e0f965f 100644
--- a/components/soc/esp32p4/ld/esp32p4.peripherals.ld
+++ b/components/soc/esp32p4/ld/esp32p4.peripherals.ld
@@ -38,6 +38,7 @@ PROVIDE ( TWAI2             = 0x500D9000 );
 PROVIDE ( ADC               = 0x500DE000 );
 PROVIDE ( USB_SERIAL_JTAG   = 0x500D2000 );
 PROVIDE ( SDMMC             = 0x50083000 );
+PROVIDE ( BITSCRAMBLER      = 0x500A3000 );
 
 PROVIDE ( INTMTX        = 0x500D6000 );
 PROVIDE ( PCNT          = 0x500C9000 );
diff --git a/components/soc/esp32p4/register/soc/bitscrambler_struct.h b/components/soc/esp32p4/register/soc/bitscrambler_struct.h
index 6a451171ba..aeb4fee033 100644
--- a/components/soc/esp32p4/register/soc/bitscrambler_struct.h
+++ b/components/soc/esp32p4/register/soc/bitscrambler_struct.h
@@ -405,27 +405,203 @@ typedef union {
     uint32_t val;
 } bitscrambler_version_reg_t;
 
+///////////////////// TX and RX registers are exactly the same //////////////////////////////////
+// The following registers are used for both TX and RX, so we can use the same struct for both //
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+/** Type of inst_cfg0 register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** inst_idx : R/W; bitpos: [2:0]; default: 0;
+         *  write this bits to specify the one of 8 instruction
+         */
+        uint32_t inst_idx:3;
+        /** inst_pos : R/W; bitpos: [6:3]; default: 0;
+         *  write this bits to specify the bit position of 257 bit instruction which in units
+         *  of 32 bits
+         */
+        uint32_t inst_pos:4;
+        uint32_t reserved_7:25;
+    };
+    uint32_t val;
+} bitscrambler_inst_cfg0_reg_t;
+
+/** Type of inst_cfg1 register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** inst : R/W; bitpos: [31:0]; default: 4;
+         *  write this bits to update instruction, Read this bits to get instruction.
+         */
+        uint32_t inst:32;
+    };
+    uint32_t val;
+} bitscrambler_inst_cfg1_reg_t;
+
+/** Type of lut_cfg0 register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** lut_idx : R/W; bitpos: [10:0]; default: 0;
+         *  write this bits to specify the bytes position of LUT RAM based on lut_mode
+         */
+        uint32_t lut_idx:11;
+        /** lut_mode : R/W; bitpos: [12:11]; default: 0;
+         *  write this bits to specify the bytes mode of LUT RAM, 0: 1 byte,1: 2bytes, 2: 4
+         *  bytes
+         */
+        uint32_t lut_mode:2;
+        uint32_t reserved_13:19;
+    };
+    uint32_t val;
+} bitscrambler_lut_cfg0_reg_t;
+
+/** Type of lut_cfg1 register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** lut : R/W; bitpos: [31:0]; default: 20;
+         *  write this bits to update LUT, Read this bits to get LUT
+         */
+        uint32_t lut:32;
+    };
+    uint32_t val;
+} bitscrambler_lut_cfg1_reg_t;
+
+/** Type of tailing_bits register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** tailing_bits : R/W; bitpos: [15:0]; default: 0;
+         *  write this bits to specify the extra data bit length after getting EOF
+         */
+        uint32_t tailing_bits:16;
+        uint32_t reserved_16:16;
+    };
+    uint32_t val;
+} bitscrambler_tailing_bits_reg_t;
+
+/** Type of ctrl register
+ *  Control and configuration registers
+ */
+typedef union {
+    struct {
+        /** ena : R/W; bitpos: [0]; default: 0;
+         *  write this bit to enable the bitscrambler tx
+         */
+        uint32_t ena:1;
+        /** pause : R/W; bitpos: [1]; default: 0;
+         *  write this bit to pause the bitscrambler tx core
+         */
+        uint32_t pause:1;
+        /** halt : R/W; bitpos: [2]; default: 1;
+         *  write this bit to halt the bitscrambler tx core
+         */
+        uint32_t halt:1;
+        /** eof_mode : R/W; bitpos: [3]; default: 0;
+         *  write this bit to ser the bitscrambler tx core EOF signal generating mode which is
+         *  combined with reg_bitscrambler_tailing_bits, 0: counter by read dma fifo, 0
+         *  counter by write peripheral buffer
+         */
+        uint32_t eof_mode:1;
+        /** cond_mode : R/W; bitpos: [4]; default: 0;
+         *  write this bit to specify the LOOP instruction condition mode of bitscrambler tx
+         *  core, 0: use the little than operator to get the condition, 1: use not equal
+         *  operator to get the condition
+         */
+        uint32_t cond_mode:1;
+        /** fetch_mode : R/W; bitpos: [5]; default: 0;
+         *  write this bit to set the bitscrambler tx core fetch instruction mode, 0: prefetch
+         *  by reset, 1: fetch by instructions
+         */
+        uint32_t fetch_mode:1;
+        /** halt_mode : R/W; bitpos: [6]; default: 0;
+         *  write this bit to set the bitscrambler tx core halt mode when halt is set, 0:
+         *  wait write data back done, , 1: ignore write data back
+         */
+        uint32_t halt_mode:1;
+        /** rd_dummy : R/W; bitpos: [7]; default: 0;
+         *  write this bit to set the bitscrambler tx core read data mode when EOF received.0:
+         *  wait read data, 1: ignore read data
+         */
+        uint32_t rd_dummy:1;
+        /** fifo_rst : WT; bitpos: [8]; default: 0;
+         *  write this bit to reset the bitscrambler tx fifo
+         */
+        uint32_t fifo_rst:1;
+        uint32_t reserved_9:23;
+    };
+    uint32_t val;
+} bitscrambler_ctrl_reg_t;
+
+/** Group: Status registers */
+/** Type of state register
+ *  Status registers
+ */
+typedef union {
+    struct {
+        /** in_idle : RO; bitpos: [0]; default: 1;
+         *  represents the bitscrambler tx core in halt mode
+         */
+        uint32_t in_idle:1;
+        /** in_run : RO; bitpos: [1]; default: 0;
+         *  represents the bitscrambler tx core in run mode
+         */
+        uint32_t in_run:1;
+        /** in_wait : RO; bitpos: [2]; default: 0;
+         *  represents the bitscrambler tx core in wait mode to wait write back done
+         */
+        uint32_t in_wait:1;
+        /** in_pause : RO; bitpos: [3]; default: 0;
+         *  represents the bitscrambler tx core in pause mode
+         */
+        uint32_t in_pause:1;
+        /** fifo_empty : RO; bitpos: [4]; default: 0;
+         *  represents the bitscrambler tx fifo in empty state
+         */
+        uint32_t fifo_empty:1;
+        uint32_t reserved_5:11;
+        /** eof_get_cnt : RO; bitpos: [29:16]; default: 0;
+         *  represents the bytes numbers of bitscrambler tx core when get EOF
+         */
+        uint32_t eof_get_cnt:14;
+        /** eof_overload : RO; bitpos: [30]; default: 0;
+         *  represents the some EOFs will be lost for bitscrambler tx core
+         */
+        uint32_t eof_overload:1;
+        /** eof_trace_clr : WT; bitpos: [31]; default: 0;
+         *  write this bit to clear reg_bitscrambler_eof_overload and
+         *  reg_bitscrambler_eof_get_cnt registers
+         */
+        uint32_t eof_trace_clr:1;
+    };
+    uint32_t val;
+} bitscrambler_state_reg_t;
 
 typedef struct {
-    volatile bitscrambler_tx_inst_cfg0_reg_t tx_inst_cfg0;
-    volatile bitscrambler_tx_inst_cfg1_reg_t tx_inst_cfg1;
-    volatile bitscrambler_rx_inst_cfg0_reg_t rx_inst_cfg0;
-    volatile bitscrambler_rx_inst_cfg1_reg_t rx_inst_cfg1;
-    volatile bitscrambler_tx_lut_cfg0_reg_t tx_lut_cfg0;
-    volatile bitscrambler_tx_lut_cfg1_reg_t tx_lut_cfg1;
-    volatile bitscrambler_rx_lut_cfg0_reg_t rx_lut_cfg0;
-    volatile bitscrambler_rx_lut_cfg1_reg_t rx_lut_cfg1;
-    volatile bitscrambler_tx_tailing_bits_reg_t tx_tailing_bits;
-    volatile bitscrambler_rx_tailing_bits_reg_t rx_tailing_bits;
-    volatile bitscrambler_tx_ctrl_reg_t tx_ctrl;
-    volatile bitscrambler_rx_ctrl_reg_t rx_ctrl;
-    volatile bitscrambler_tx_state_reg_t tx_state;
-    volatile bitscrambler_rx_state_reg_t rx_state;
+    volatile struct {
+        bitscrambler_inst_cfg0_reg_t cfg0;
+        bitscrambler_inst_cfg1_reg_t cfg1;
+    } inst_cfg[2];
+    volatile struct {
+        bitscrambler_lut_cfg0_reg_t cfg0;
+        bitscrambler_lut_cfg1_reg_t cfg1;
+    } lut_cfg[2];
+    volatile bitscrambler_tailing_bits_reg_t tailing_bits[2];
+    volatile bitscrambler_ctrl_reg_t ctrl[2];
+    volatile bitscrambler_state_reg_t state[2];
     uint32_t reserved_038[48];
     volatile bitscrambler_sys_reg_t sys;
     volatile bitscrambler_version_reg_t version;
 } bitscrambler_dev_t;
 
+extern bitscrambler_dev_t BITSCRAMBLER;
 
 #ifndef __cplusplus
 _Static_assert(sizeof(bitscrambler_dev_t) == 0x100, "Invalid size of bitscrambler_dev_t structure");
diff --git a/components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h b/components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h
index 500b59e2c2..ffd1dd2f20 100644
--- a/components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h
+++ b/components/soc/esp32p4/register/soc/hp_sys_clkrst_reg.h
@@ -570,27 +570,27 @@ extern "C" {
 #define HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN_S)
 #define HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN_V  0x00000001U
 #define HP_SYS_CLKRST_REG_KEY_MANAGER_SYS_CLK_EN_S  27
-/** HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN : R/W; bitpos: [28]; default: 1;
+/** HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN : R/W; bitpos: [28]; default: 1;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN    (BIT(28))
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN_S)
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN_V  0x00000001U
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_SYS_CLK_EN_S  28
-/** HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN : R/W; bitpos: [29]; default: 1;
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN    (BIT(28))
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN_S)
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN_V  0x00000001U
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_SYS_CLK_EN_S  28
+/** HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN : R/W; bitpos: [29]; default: 1;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN    (BIT(29))
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN_S)
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN_V  0x00000001U
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_RX_SYS_CLK_EN_S  29
-/** HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN : R/W; bitpos: [30]; default: 1;
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN    (BIT(29))
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN_S)
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN_V  0x00000001U
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_RX_SYS_CLK_EN_S  29
+/** HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN : R/W; bitpos: [30]; default: 1;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN    (BIT(30))
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN_S)
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN_V  0x00000001U
-#define HP_SYS_CLKRST_REG_BITSRAMBLER_TX_SYS_CLK_EN_S  30
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN    (BIT(30))
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN_M  (HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN_V << HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN_S)
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN_V  0x00000001U
+#define HP_SYS_CLKRST_REG_BITSCRAMBLER_TX_SYS_CLK_EN_S  30
 /** HP_SYS_CLKRST_REG_H264_SYS_CLK_EN : R/W; bitpos: [31]; default: 0;
  *  Reserved
  */
@@ -3597,27 +3597,27 @@ extern "C" {
 #define HP_SYS_CLKRST_REG_RST_EN_ADC_M  (HP_SYS_CLKRST_REG_RST_EN_ADC_V << HP_SYS_CLKRST_REG_RST_EN_ADC_S)
 #define HP_SYS_CLKRST_REG_RST_EN_ADC_V  0x00000001U
 #define HP_SYS_CLKRST_REG_RST_EN_ADC_S  10
-/** HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER : R/W; bitpos: [11]; default: 0;
+/** HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER : R/W; bitpos: [11]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER    (BIT(11))
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_M  (HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_V << HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_S)
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_V  0x00000001U
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_S  11
-/** HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX : R/W; bitpos: [12]; default: 0;
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER    (BIT(11))
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_M  (HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_V << HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_S)
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_V  0x00000001U
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_S  11
+/** HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX : R/W; bitpos: [12]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX    (BIT(12))
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX_M  (HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX_V << HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX_S)
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX_V  0x00000001U
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_RX_S  12
-/** HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX : R/W; bitpos: [13]; default: 0;
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX    (BIT(12))
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX_M  (HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX_V << HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX_S)
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX_V  0x00000001U
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_RX_S  12
+/** HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX : R/W; bitpos: [13]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX    (BIT(13))
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX_M  (HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX_V << HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX_S)
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX_V  0x00000001U
-#define HP_SYS_CLKRST_REG_RST_EN_BITSRAMBLER_TX_S  13
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX    (BIT(13))
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX_M  (HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX_V << HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX_S)
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX_V  0x00000001U
+#define HP_SYS_CLKRST_REG_RST_EN_BITSCRAMBLER_TX_S  13
 /** HP_SYS_CLKRST_REG_RST_EN_CRYPTO : R/W; bitpos: [14]; default: 0;
  *  Reserved
  */
@@ -4090,27 +4090,27 @@ extern "C" {
 #define HP_SYS_CLKRST_REG_FORCE_NORST_ADC_M  (HP_SYS_CLKRST_REG_FORCE_NORST_ADC_V << HP_SYS_CLKRST_REG_FORCE_NORST_ADC_S)
 #define HP_SYS_CLKRST_REG_FORCE_NORST_ADC_V  0x00000001U
 #define HP_SYS_CLKRST_REG_FORCE_NORST_ADC_S  22
-/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER : R/W; bitpos: [23]; default: 0;
+/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER : R/W; bitpos: [23]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER    (BIT(23))
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_S)
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_V  0x00000001U
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_S  23
-/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX : R/W; bitpos: [24]; default: 0;
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER    (BIT(23))
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_S)
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_V  0x00000001U
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_S  23
+/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX : R/W; bitpos: [24]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX    (BIT(24))
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX_S)
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX_V  0x00000001U
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_RX_S  24
-/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX : R/W; bitpos: [25]; default: 0;
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX    (BIT(24))
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX_S)
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX_V  0x00000001U
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_RX_S  24
+/** HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX : R/W; bitpos: [25]; default: 0;
  *  Reserved
  */
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX    (BIT(25))
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX_S)
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX_V  0x00000001U
-#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSRAMBLER_TX_S  25
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX    (BIT(25))
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX_M  (HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX_V << HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX_S)
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX_V  0x00000001U
+#define HP_SYS_CLKRST_REG_FORCE_NORST_BITSCRAMBLER_TX_S  25
 /** HP_SYS_CLKRST_REG_FORCE_NORST_H264 : R/W; bitpos: [26]; default: 0;
  *  Reserved
  */
diff --git a/components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h b/components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h
index 822ad73ecc..ff5a1acbb8 100644
--- a/components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h
+++ b/components/soc/esp32p4/register/soc/hp_sys_clkrst_struct.h
@@ -377,18 +377,18 @@ typedef union {
          *  Reserved
          */
         uint32_t reg_key_manager_sys_clk_en:1;
-        /** reg_bitsrambler_sys_clk_en : R/W; bitpos: [28]; default: 1;
+        /** reg_bitscrambler_sys_clk_en : R/W; bitpos: [28]; default: 1;
          *  Reserved
          */
-        uint32_t reg_bitsrambler_sys_clk_en:1;
-        /** reg_bitsrambler_rx_sys_clk_en : R/W; bitpos: [29]; default: 1;
+        uint32_t reg_bitscrambler_sys_clk_en:1;
+        /** reg_bitscrambler_rx_sys_clk_en : R/W; bitpos: [29]; default: 1;
          *  Reserved
          */
-        uint32_t reg_bitsrambler_rx_sys_clk_en:1;
-        /** reg_bitsrambler_tx_sys_clk_en : R/W; bitpos: [30]; default: 1;
+        uint32_t reg_bitscrambler_rx_sys_clk_en:1;
+        /** reg_bitscrambler_tx_sys_clk_en : R/W; bitpos: [30]; default: 1;
          *  Reserved
          */
-        uint32_t reg_bitsrambler_tx_sys_clk_en:1;
+        uint32_t reg_bitscrambler_tx_sys_clk_en:1;
         /** reg_h264_sys_clk_en : R/W; bitpos: [31]; default: 0;
          *  Reserved
          */
@@ -2427,18 +2427,18 @@ typedef union {
          *  Reserved
          */
         uint32_t reg_rst_en_adc:1;
-        /** reg_rst_en_bitsrambler : R/W; bitpos: [11]; default: 0;
+        /** reg_rst_en_bitscrambler : R/W; bitpos: [11]; default: 0;
          *  Reserved
          */
-        uint32_t reg_rst_en_bitsrambler:1;
-        /** reg_rst_en_bitsrambler_rx : R/W; bitpos: [12]; default: 0;
+        uint32_t reg_rst_en_bitscrambler:1;
+        /** reg_rst_en_bitscrambler_rx : R/W; bitpos: [12]; default: 0;
          *  Reserved
          */
-        uint32_t reg_rst_en_bitsrambler_rx:1;
-        /** reg_rst_en_bitsrambler_tx : R/W; bitpos: [13]; default: 0;
+        uint32_t reg_rst_en_bitscrambler_rx:1;
+        /** reg_rst_en_bitscrambler_tx : R/W; bitpos: [13]; default: 0;
          *  Reserved
          */
-        uint32_t reg_rst_en_bitsrambler_tx:1;
+        uint32_t reg_rst_en_bitscrambler_tx:1;
         /** reg_rst_en_crypto : R/W; bitpos: [14]; default: 0;
          *  Reserved
          */
@@ -2724,18 +2724,18 @@ typedef union {
          *  Reserved
          */
         uint32_t reg_force_norst_adc:1;
-        /** reg_force_norst_bitsrambler : R/W; bitpos: [23]; default: 0;
+        /** reg_force_norst_bitscrambler : R/W; bitpos: [23]; default: 0;
          *  Reserved
          */
-        uint32_t reg_force_norst_bitsrambler:1;
-        /** reg_force_norst_bitsrambler_rx : R/W; bitpos: [24]; default: 0;
+        uint32_t reg_force_norst_bitscrambler:1;
+        /** reg_force_norst_bitscrambler_rx : R/W; bitpos: [24]; default: 0;
          *  Reserved
          */
-        uint32_t reg_force_norst_bitsrambler_rx:1;
-        /** reg_force_norst_bitsrambler_tx : R/W; bitpos: [25]; default: 0;
+        uint32_t reg_force_norst_bitscrambler_rx:1;
+        /** reg_force_norst_bitscrambler_tx : R/W; bitpos: [25]; default: 0;
          *  Reserved
          */
-        uint32_t reg_force_norst_bitsrambler_tx:1;
+        uint32_t reg_force_norst_bitscrambler_tx:1;
         /** reg_force_norst_h264 : R/W; bitpos: [26]; default: 0;
          *  Reserved
          */
diff --git a/components/soc/esp32p4/register/soc/reg_base.h b/components/soc/esp32p4/register/soc/reg_base.h
index 5b5d58708c..0cd0e31006 100644
--- a/components/soc/esp32p4/register/soc/reg_base.h
+++ b/components/soc/esp32p4/register/soc/reg_base.h
@@ -64,7 +64,7 @@
 #define DR_REG_DSI_BRG_BASE           (DR_REG_HPPERIPH0_BASE + 0xA0800)
 #define DR_REG_ISP_BASE               (DR_REG_HPPERIPH0_BASE + 0xA1000)
 #define DR_REG_RMT_BASE               (DR_REG_HPPERIPH0_BASE + 0xA2000)
-#define DR_REG_BITSCRAM_BASE          (DR_REG_HPPERIPH0_BASE + 0xA3000)
+#define DR_REG_BITSCRAMBLER_BASE      (DR_REG_HPPERIPH0_BASE + 0xA3000)
 #define DR_REG_AXI_ICM_BASE           (DR_REG_HPPERIPH0_BASE + 0xA4000)
 #define DR_REG_AXI_ICM_QOS_BASE       (DR_REG_AXI_ICM_BASE   + 0x400)
 #define DR_REG_HP_PERI_PMS_BASE       (DR_REG_HPPERIPH0_BASE + 0xA5000)