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esp32s2: fix interrupt names used by SystemView

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This commit is contained in:
Ivan Grokhotkov
2020-01-22 13:39:42 +01:00
parent bb59ca3ab3
commit 3eb190ce48
1 changed files with 37 additions and 29 deletions
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66
components/soc/esp32s2/interrupts.c
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@@ -70,36 +70,44 @@ const char * const esp_isr_names[ETS_MAX_INTR_SOURCE] = {
[52] = "I2C_EXT0", [52] = "I2C_EXT0",
[53] = "I2C_EXT1", [53] = "I2C_EXT1",
[54] = "RSA", [54] = "RSA",
[55] = "SPI1_DMA", [55] = "SHA",
[56] = "SPI2_DMA", [56] = "AES",
[57] = "SPI3_DMA", [57] = "SPI2_DMA",
[58] = "WDT", [58] = "SPI3_DMA",
[59] = "TIMER1", [59] = "WDT",
[60] = "TIMER2", [60] = "TIMER1",
[61] = "TG0_T0_EDGE", [61] = "TIMER2",
[62] = "TG0_T1_EDGE", [62] = "TG0_T0_EDGE",
[63] = "TG0_WDT_EDGE", [63] = "TG0_T1_EDGE",
[64] = "TG0_LACT_EDGE", [64] = "TG0_WDT_EDGE",
[65] = "TG1_T0_EDGE", [65] = "TG0_LACT_EDGE",
[66] = "TG1_T1_EDGE", [66] = "TG1_T0_EDGE",
[67] = "TG1_WDT_EDGE", [67] = "TG1_T1_EDGE",
[68] = "TG1_LACT_EDGE", [68] = "TG1_WDT_EDGE",
[69] = "CACHE_IA", [69] = "TG1_LACT_EDGE",
[70] = "SYSTIMER_TARGET0", [70] = "CACHE_IA",
[71] = "SYSTIMER_TARGET1", [71] = "SYSTIMER_TARGET0",
[72] = "SYSTIMER_TARGET2", [72] = "SYSTIMER_TARGET1",
[73] = "ASSIST_DEBUG", [73] = "SYSTIMER_TARGET2",
[74] = "PMS_PRO_IRAM0_ILG", [74] = "ASSIST_DEBUG",
[75] = "PMS_PRO_DRAM0_ILG", [75] = "PMS_PRO_IRAM0_ILG",
[76] = "PMS_PRO_DPORT_ILG", [76] = "PMS_PRO_DRAM0_ILG",
[77] = "PMS_PRO_AHB_ILG", [77] = "PMS_PRO_DPORT_ILG",
[78] = "PMS_PRO_CACHE_ILG", [78] = "PMS_PRO_AHB_ILG",
[79] = "PMS_DMA_APB_I_ILG", [79] = "PMS_PRO_CACHE_ILG",
[80] = "PMS_DMA_RX_I_ILG", [80] = "PMS_DMA_APB_I_ILG",
[81] = "PMS_DMA_TX_I_ILG", [81] = "PMS_DMA_RX_I_ILG",
[82] = "SPI0_REJECT_CACHE", [82] = "PMS_DMA_TX_I_ILG",
[83] = "SPI1_REJECT_CPU", [83] = "SPI0_REJECT_CACHE",
[84] = "DMA_COPY", [84] = "DMA_COPY",
[85] = "SPI4_DMA", [85] = "SPI4_DMA",
[86] = "SPI4", [86] = "SPI4",
[87] = "ICACHE_PRELOAD",
[88] = "DCACHE_PRELOAD",
[89] = "APB_ADC",
[90] = "CRYPTO_DMA",
[91] = "CPU_PERI_ERR",
[92] = "APB_PERI_ERR",
[93] = "DCACHE_SYNC",
[94] = "ICACHE_SYNC",
}; };