esp32: move dport_access

This commit is contained in:
Renz Bagaporo
2021-03-19 14:30:56 +08:00
committed by Michael (XIAO Xufeng)
parent 702e41e1c8
commit 452bfda367
20 changed files with 36 additions and 12 deletions

View File

@@ -13,7 +13,6 @@ else()
# Regular app build # Regular app build
set(srcs set(srcs
"cache_sram_mmu.c" "cache_sram_mmu.c"
"dport_access.c"
"esp_himem.c" "esp_himem.c"
"spiram.c" "spiram.c"
"spiram_psram.c") "spiram_psram.c")

View File

@@ -11,7 +11,7 @@ if(BOOTLOADER_BUILD)
else() else()
# Regular app build # Regular app build
set(srcs "dport_access.c") set(srcs)
set(include_dirs "include") set(include_dirs "include")
set(requires driver efuse soc riscv) #unfortunately rom/uart uses SOC registers directly set(requires driver efuse soc riscv) #unfortunately rom/uart uses SOC registers directly
@@ -36,8 +36,7 @@ else()
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32c3.project.ld.in" target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp32c3.project.ld.in"
PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32c3.project.ld") PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp32c3.project.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32c3.peripherals.ld") target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp32c3.peripherals.ld")
target_link_libraries(${COMPONENT_LIB} INTERFACE gcc)
target_link_libraries(${COMPONENT_LIB} PUBLIC gcc)
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0") target_link_libraries(${COMPONENT_LIB} INTERFACE "-u call_user_start_cpu0")
idf_build_get_property(config_dir CONFIG_DIR) idf_build_get_property(config_dir CONFIG_DIR)

View File

@@ -11,8 +11,7 @@ if(BOOTLOADER_BUILD)
else() else()
# Regular app build # Regular app build
set(srcs "dport_access.c" set(srcs "spiram.c"
"spiram.c"
"spiram_psram.c") "spiram_psram.c")
set(include_dirs "include") set(include_dirs "include")

View File

@@ -14,6 +14,7 @@ else()
set(srcs "dport_access.c" set(srcs "dport_access.c"
"spiram.c" "spiram.c"
"spiram_psram.c"
"spi_timing_config.c") "spi_timing_config.c")
set(include_dirs "include") set(include_dirs "include")

View File

@@ -3,7 +3,7 @@ COMPONENT_ADD_INCLUDEDIRS := . include port/$(IDF_TARGET)/ include/soc port/$(ID
COMPONENT_ADD_LDFRAGMENTS := linker.lf COMPONENT_ADD_LDFRAGMENTS := linker.lf
ifdef IS_BOOTLOADER_BUILD ifdef IS_BOOTLOADER_BUILD
COMPONENT_OBJEXCLUDE += clk_ctrl_os.o mac_addr.o sp_async_memcpy.o intr_alloc.o sleep_modes.o regi2c_ctrl.o COMPONENT_OBJEXCLUDE += clk_ctrl_os.o mac_addr.o esp_async_memcpy.o intr_alloc.o sleep_modes.o regi2c_ctrl.o port/$(IDF_TARGET)/dport_access.o
endif endif
COMPONENT_OBJEXCLUDE += esp_async_memcpy.o COMPONENT_OBJEXCLUDE += esp_async_memcpy.o

View File

@@ -15,6 +15,8 @@
#ifndef _ESP_DPORT_ACCESS_H_ #ifndef _ESP_DPORT_ACCESS_H_
#define _ESP_DPORT_ACCESS_H_ #define _ESP_DPORT_ACCESS_H_
#include <stdint.h>
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif

View File

@@ -15,6 +15,8 @@
#ifndef _ESP_DPORT_ACCESS_H_ #ifndef _ESP_DPORT_ACCESS_H_
#define _ESP_DPORT_ACCESS_H_ #define _ESP_DPORT_ACCESS_H_
#include <stdint.h>
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif

View File

@@ -11,5 +11,9 @@ set(srcs
"rtc_wdt.c" "rtc_wdt.c"
"chip_info.c") "chip_info.c")
if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "dport_access.c")
endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}")
target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") target_sources(${COMPONENT_LIB} PRIVATE "${srcs}")

View File

@@ -13,7 +13,8 @@ if(NOT BOOTLOADER_BUILD)
"memprot.c" "memprot.c"
"esp_hmac.c" "esp_hmac.c"
"esp_crypto_lock.c" "esp_crypto_lock.c"
"esp_ds.c") "esp_ds.c"
"dport_access.c")
endif() endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}")

View File

@@ -18,7 +18,8 @@ if(NOT BOOTLOADER_BUILD)
"memprot.c" "memprot.c"
"esp_hmac.c" "esp_hmac.c"
"esp_crypto_lock.c" "esp_crypto_lock.c"
"esp_ds.c") "esp_ds.c"
"dport_access.c")
endif() endif()
add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}")

View File

@@ -14,6 +14,7 @@ set(srcs
if(NOT BOOTLOADER_BUILD) if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "../async_memcpy_impl_gdma.c" list(APPEND srcs "../async_memcpy_impl_gdma.c"
"dport_access.c"
"esp_crypto_lock.c" "esp_crypto_lock.c"
"memprot.c") "memprot.c")
endif() endif()

View File

@@ -3,6 +3,9 @@
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include "xtensa/core-macros.h" #include "xtensa/core-macros.h"
@@ -26,6 +29,7 @@
#include "esp_intr_alloc.h" #include "esp_intr_alloc.h"
#include "driver/timer.h" #include "driver/timer.h"
#define MHZ (1000000) #define MHZ (1000000)
static volatile bool exit_flag; static volatile bool exit_flag;
static bool dport_test_result; static bool dport_test_result;
@@ -501,3 +505,5 @@ TEST_CASE("Check pre-read workaround DPORT and Hi-interrupt (2)", "[esp32]")
run_tasks("accessAPB", accessAPB, "accessDPORT3", accessDPORT3, 10000); run_tasks("accessAPB", accessAPB, "accessDPORT3", accessDPORT3, 10000);
} }
#endif // CONFIG_FREERTOS_UNICORE #endif // CONFIG_FREERTOS_UNICORE
#endif // CONFIG_IDF_TARGET_ESP32

View File

@@ -1,9 +1,11 @@
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32
#include <xtensa/coreasm.h> #include <xtensa/coreasm.h>
#include <xtensa/corebits.h> #include <xtensa/corebits.h>
#include <xtensa/config/system.h> #include <xtensa/config/system.h>
#include "freertos/xtensa_context.h" #include "freertos/xtensa_context.h"
#include "esp_private/panic_reason.h" #include "esp_private/panic_reason.h"
#include "sdkconfig.h"
#include "soc/soc.h" #include "soc/soc.h"
#include "soc/dport_reg.h" #include "soc/dport_reg.h"
@@ -76,3 +78,5 @@ xt_highint5:
.global ld_include_test_dport_xt_highint5 .global ld_include_test_dport_xt_highint5
ld_include_test_dport_xt_highint5: ld_include_test_dport_xt_highint5:
#endif // CONFIG_FREERTOS_UNICORE #endif // CONFIG_FREERTOS_UNICORE
#endif // CONFIG_IDF_TARGET_ESP32

View File

@@ -6,8 +6,11 @@
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include "esp_types.h" #include <sdkconfig.h>
#if CONFIG_IDF_TARGET_ESP32
#include "esp_types.h"
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
#include "freertos/task.h" #include "freertos/task.h"
#include "freertos/semphr.h" #include "freertos/semphr.h"
@@ -20,10 +23,10 @@
#include "soc/dport_reg.h" #include "soc/dport_reg.h"
#include "soc/rtc.h" #include "soc/rtc.h"
#include "esp_log.h" #include "esp_log.h"
#include "mbedtls/sha256.h"
#include "sha/sha_parallel_engine.h" #include "sha/sha_parallel_engine.h"
#include "aes/esp_aes.h" #include "aes/esp_aes.h"
#include "mbedtls/rsa.h" #include "mbedtls/rsa.h"
#include "mbedtls/sha256.h"
static const char *TAG = "test"; static const char *TAG = "test";
static volatile bool exit_flag = false; static volatile bool exit_flag = false;
@@ -289,3 +292,5 @@ TEST_CASE("Test shared using AES SHA RSA", "[hw_crypto]")
vSemaphoreDelete(exit_sema[i]); vSemaphoreDelete(exit_sema[i]);
} }
} }
#endif // CONFIG_IDF_TARGET_ESP32