diff --git a/components/esp_hw_support/mspi_timing_tuning.c b/components/esp_hw_support/mspi_timing_tuning.c
index aa315ef1a1..5699b4837c 100644
--- a/components/esp_hw_support/mspi_timing_tuning.c
+++ b/components/esp_hw_support/mspi_timing_tuning.c
@@ -28,7 +28,7 @@
 #include "hal/spimem_flash_ll.h"
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+#if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 // TODO: IDF-10464
 #include "hal/mspi_timing_tuning_ll.h"
 #endif
 
@@ -469,7 +469,7 @@ void mspi_timing_psram_tuning(void)
 void mspi_timing_enter_low_speed_mode(bool control_spi1)
 {
 #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
-#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+#if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61 // TODO: IDF-10464
     mspi_ll_clock_src_sel(MSPI_CLK_SRC_XTAL);
 #else
     spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_ROM_DEFAULT);
@@ -509,7 +509,7 @@ void mspi_timing_enter_low_speed_mode(bool control_spi1)
 void mspi_timing_enter_high_speed_mode(bool control_spi1)
 {
 #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
-#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+#if CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61// TODO: IDF-10464
     mspi_ll_clock_src_sel(MSPI_CLK_SRC_SPLL);
 #else
     spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_DEFAULT);
diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
index 6c87a6e85c..a5028f1f0b 100644
--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -523,6 +523,10 @@ config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
     bool
     default y
 
+config SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
+    bool
+    default y
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2
diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h
index 079be413c6..4234ffcd1f 100644
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -319,6 +319,7 @@
 #define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED         1
+#define SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT   1
 
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 #define SOC_SYSTIMER_COUNTER_NUM            2  // Number of counter units