feat(xip_psram): support xip psram example on p4

This commit is contained in:
Armando
2024-07-25 10:52:59 +08:00
parent a22a60c6a1
commit 4865e64be5
7 changed files with 52 additions and 27 deletions

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@ -394,6 +394,3 @@ examples/system/xip_from_psram:
disable:
- if: IDF_TARGET == "esp32"
reason: target esp32 doesn't support this feature.
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: not supported on p4 #TODO: IDF-7556

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@ -5,4 +5,8 @@
cmake_minimum_required(VERSION 3.16)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
# "Trim" the build. Include the minimal set of components, main, and anything it depends on.
set(COMPONENTS main)
project(xip_from_psram)

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@ -1,5 +1,5 @@
| Supported Targets | ESP32-S2 | ESP32-S3 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- |
# XIP (Execute-In-Place) From PSRAM Example
@ -17,7 +17,7 @@ By default, during `SET2` operations, concurrent access requests to the Flash an
Only ISRs in internal RAM will get executed during `SET2` operations. Besides, if any functions or data are accessed in these ISRs (usually this happens in ISR callbacks), they need to be placed into internal RAM as well. For interrupt handlers which need to execute when the cache is disabled (e.g., for low latency operations), you need to set the ESP_INTR_FLAG_IRAM flag when the interrupt handler is registered.
When **CONFIG_SPIRAM_FETCH_INSTRUCTIONS** and **CONFIG_SPIRAM_RODATA** are both enabled, the `flash.text` sections (for instructions) and the `.rodata` section (read only data) will be moved to PSRAM. Corresponding virtual memory range will be re-mapped to PSRAM. Under this condition, ESP-IDF won't disable concurrent accesses to external memory (`SET1` operations) anymore.
When **CONFIG_SPIRAM_XIP_FROM_PSRAM** is enabled, the `flash.text` sections (for instructions) and the `.rodata` section (read only data) will be moved to PSRAM. Corresponding virtual memory range will be mapped to PSRAM. Under this condition, ESP-IDF won't disable concurrent accesses to external memory (`SET1` operations) anymore.
By using this feature, during `SET2` operations, placement of ISRs, ISR callbacks, and related data are no longer limited to internal RAM.

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@ -1,2 +1,3 @@
idf_component_register(SRCS "xip_from_psram_example_main.c"
INCLUDE_DIRS ".")
INCLUDE_DIRS "."
REQUIRES esp_psram esp_partition spi_flash esp_timer)

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@ -1,12 +1,12 @@
# SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded.dut import Dut
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32p4
@pytest.mark.generic
# in order to build the default sdkconfig(the CI won't build the sdkconfig.defaults if there is a sdkconfig.ci.xx)
@pytest.mark.parametrize(
@ -47,3 +47,24 @@ def test_xip_from_psram_example_f4r8(dut: Dut) -> None:
res = dut.expect(r'callback\(in IRAM\) response time: (\d{1,3}) us')
response_time = res.group(1).decode('utf8')
assert float(response_time) <= 12
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize(
'config',
[
'esp32p4_200m',
],
indirect=True,
)
def test_xip_from_psram_example_p4_200m(dut: Dut) -> None:
dut.expect_exact('found partition')
res = dut.expect(r'callback\(in PSRAM\) response time: (\d{1,3}) us')
response_time = res.group(1).decode('utf8')
assert float(response_time) <= 10
res = dut.expect(r'callback\(in IRAM\) response time: (\d{1,3}) us')
response_time = res.group(1).decode('utf8')
assert float(response_time) <= 10

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@ -3,5 +3,4 @@ CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_FETCH_INSTRUCTIONS=y
CONFIG_SPIRAM_RODATA=y
CONFIG_SPIRAM_XIP_FROM_PSRAM=y

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@ -0,0 +1,3 @@
CONFIG_IDF_TARGET="esp32p4"
CONFIG_IDF_EXPERIMENTAL_FEATURES=y
CONFIG_SPIRAM_SPEED_200M=y