From baa4d516564d6497df3a4a60ccc5019739716a88 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 24 Sep 2024 10:15:17 +0800 Subject: [PATCH 1/2] fix(esp_hw_support): fix bad submode setting logic in rtc_slow selection --- components/esp_hw_support/port/esp32/rtc_clk.c | 2 +- components/esp_hw_support/port/esp32c2/rtc_clk.c | 2 +- components/esp_hw_support/port/esp32c3/rtc_clk.c | 2 +- components/esp_hw_support/port/esp32s2/rtc_clk.c | 2 +- components/esp_hw_support/port/esp32s3/rtc_clk.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/components/esp_hw_support/port/esp32/rtc_clk.c b/components/esp_hw_support/port/esp32/rtc_clk.c index 6a6e3fa3d5..cdf9871078 100644 --- a/components/esp_hw_support/port/esp32/rtc_clk.c +++ b/components/esp_hw_support/port/esp32/rtc_clk.c @@ -279,7 +279,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src) // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); - } else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 + } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); } #endif diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c index 59a6f63bff..a36a186a23 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c @@ -72,7 +72,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src) // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); - } else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 + } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); } #endif diff --git a/components/esp_hw_support/port/esp32c3/rtc_clk.c b/components/esp_hw_support/port/esp32c3/rtc_clk.c index cec3673dbe..549e3c426c 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c3/rtc_clk.c @@ -105,7 +105,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src) // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); - } else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 + } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); } #endif diff --git a/components/esp_hw_support/port/esp32s2/rtc_clk.c b/components/esp_hw_support/port/esp32s2/rtc_clk.c index 91637bf300..07f8074f14 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s2/rtc_clk.c @@ -180,7 +180,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src) // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); - } else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 + } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); } #endif diff --git a/components/esp_hw_support/port/esp32s3/rtc_clk.c b/components/esp_hw_support/port/esp32s3/rtc_clk.c index 4ad2f30239..d101a1d5d9 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s3/rtc_clk.c @@ -120,7 +120,7 @@ void rtc_clk_slow_src_set(soc_rtc_slow_clk_src_t clk_src) // Keep the RTC8M_CLK on in sleep if RTC clock is rc_fast_d256. if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch to RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, true); - } else if (clk_src == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 + } else if (clk_src != SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256 && clk_src_before_switch == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { // Switch away from RC_FAST_D256 esp_sleep_sub_mode_config(ESP_SLEEP_RTC_USE_RC_FAST_MODE, false); } #endif From 5971155ac4eaa7ea455abd8a4431121b7695b8a9 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 24 Sep 2024 11:25:15 +0800 Subject: [PATCH 2/2] feat(esp_hw_support): add case to test slow clock switching --- .../test_apps/rtc_clk/main/test_rtc_clk.c | 23 ++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c b/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c index 7254b6328f..49a7dc8dd3 100644 --- a/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c +++ b/components/esp_hw_support/test_apps/rtc_clk/main/test_rtc_clk.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -24,6 +24,7 @@ #include "esp_rom_sys.h" #include "esp_rom_uart.h" #include "test_utils.h" +#include "esp_random.h" #include "esp_sleep.h" #include "esp_system.h" #include "esp_private/esp_clk.h" @@ -119,6 +120,26 @@ TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]") #endif } +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 +TEST_CASE("Test RTC_SLOW_CLK sources switching", "[rtc_clk]") +{ + soc_rtc_slow_clk_src_t clk_src_before_switch = rtc_clk_slow_src_get(); + soc_rtc_slow_clk_src_t switching_sources[] = {SOC_RTC_SLOW_CLK_SRC_RC_SLOW, SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256}; + + for (uint32_t test_cnt = 0; test_cnt < 100; test_cnt++) { + uint32_t src_id = esp_random() % 2; + if (switching_sources[src_id] == SOC_RTC_SLOW_CLK_SRC_RC_FAST_D256) { + rtc_clk_8m_enable(true, true); + } + rtc_clk_slow_src_set(switching_sources[src_id]); + esp_rom_delay_us(10*1000); + TEST_ASSERT_EQUAL(switching_sources[src_id], rtc_clk_slow_src_get()); + } + rtc_clk_slow_src_set(clk_src_before_switch); + printf("done\n"); +} +#endif + /* The following two are not unit tests, but are added here to make it easy to * check the frequency of 150k/32k oscillators. The following two "tests" will * output either 32k or 150k clock to GPIO25.