From 4a124913c49fd5985a6db3455630b28893843100 Mon Sep 17 00:00:00 2001
From: Lou Tianhao <loutianhao@espressif.com>
Date: Mon, 15 Jul 2024 15:20:47 +0800
Subject: [PATCH] fix(pm): mspi cannot access flash when pd pll source

---
 components/esp_hw_support/mspi_timing_tuning.c       | 12 ++++++++++++
 .../soc/esp32c5/include/soc/Kconfig.soc_caps.in      |  4 ++++
 components/soc/esp32c5/include/soc/soc_caps.h        |  1 +
 3 files changed, 17 insertions(+)

diff --git a/components/esp_hw_support/mspi_timing_tuning.c b/components/esp_hw_support/mspi_timing_tuning.c
index 4d3e4e2685..aa315ef1a1 100644
--- a/components/esp_hw_support/mspi_timing_tuning.c
+++ b/components/esp_hw_support/mspi_timing_tuning.c
@@ -28,6 +28,10 @@
 #include "hal/spimem_flash_ll.h"
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+#include "hal/mspi_timing_tuning_ll.h"
+#endif
+
 #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
 #include "esp_ipc_isr.h"
 #endif
@@ -465,7 +469,11 @@ void mspi_timing_psram_tuning(void)
 void mspi_timing_enter_low_speed_mode(bool control_spi1)
 {
 #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
+#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+    mspi_ll_clock_src_sel(MSPI_CLK_SRC_XTAL);
+#else
     spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_ROM_DEFAULT);
+#endif
 #endif  //SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
 
 #if SOC_SPI_MEM_SUPPORT_TIMING_TUNING
@@ -501,7 +509,11 @@ void mspi_timing_enter_low_speed_mode(bool control_spi1)
 void mspi_timing_enter_high_speed_mode(bool control_spi1)
 {
 #if SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
+#if CONFIG_IDF_TARGET_ESP32C5 // TODO: IDF-10464
+    mspi_ll_clock_src_sel(MSPI_CLK_SRC_SPLL);
+#else
     spimem_flash_ll_set_clock_source(MSPI_CLK_SRC_DEFAULT);
+#endif
 #endif  //SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
 
 #if SOC_SPI_MEM_SUPPORT_TIMING_TUNING
diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
index 4c96f629c3..6abe798726 100644
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -1015,6 +1015,10 @@ config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
     bool
     default y
 
+config SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT
+    bool
+    default y
+
 config SOC_SYSTIMER_COUNTER_NUM
     int
     default 2
diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h
index 69c4bbab4f..984abfd79c 100644
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -438,6 +438,7 @@
 #define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED         1
 #define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED         1
+#define SOC_MEMSPI_FLASH_CLK_SRC_IS_INDEPENDENT   1
 
 /*-------------------------- SYSTIMER CAPS ----------------------------------*/
 // TODO: [ESP32C5] IDF-8707