From 7dd054fe6bf6436265e5ca1c43e15f3045aa41cb Mon Sep 17 00:00:00 2001 From: Xiao Xufeng Date: Fri, 28 Apr 2023 18:48:43 +0800 Subject: [PATCH 1/2] i2s: use STAILQ_NEXT instead empty to improve readability --- components/driver/i2s/i2s_common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/components/driver/i2s/i2s_common.c b/components/driver/i2s/i2s_common.c index 3f5d887ba2..7a0f91652c 100644 --- a/components/driver/i2s/i2s_common.c +++ b/components/driver/i2s/i2s_common.c @@ -423,7 +423,7 @@ esp_err_t i2s_alloc_dma_desc(i2s_chan_handle_t handle, uint32_t num, uint32_t bu /* Connect DMA descriptor as a circle */ for (int i = 0; i < num; i++) { /* Link to the next descriptor */ - handle->dma.desc[i]->empty = (uint32_t)((i < (num - 1)) ? (handle->dma.desc[i + 1]) : handle->dma.desc[0]); + STAILQ_NEXT(handle->dma.desc[i], qe) = (i < (num - 1)) ? (handle->dma.desc[i + 1]) : handle->dma.desc[0]; } if (handle->dir == I2S_DIR_RX) { i2s_ll_rx_set_eof_num(handle->controller->hal.dev, bufsize); @@ -1088,8 +1088,8 @@ esp_err_t i2s_channel_preload_data(i2s_chan_handle_t tx_handle, const void *src, /* If the next descriptor is not the first descriptor, keep load to the first descriptor * otherwise all descriptor has been loaded, break directly, the dma buffer position * will remain at the end of the last dma buffer */ - if (desc_ptr->empty != (uint32_t)tx_handle->dma.desc[0]) { - desc_ptr = (lldesc_t *)desc_ptr->empty; + if (STAILQ_NEXT(desc_ptr, qe) != tx_handle->dma.desc[0]) { + desc_ptr = STAILQ_NEXT(desc_ptr, qe); tx_handle->dma.curr_ptr = (void *)desc_ptr; tx_handle->dma.rw_pos = 0; } else { From b24ce390c097352ead70a6c988721943e05c772a Mon Sep 17 00:00:00 2001 From: Xiao Xufeng Date: Fri, 28 Apr 2023 18:56:00 +0800 Subject: [PATCH 2/2] dac: use STQILA instead empty to improve readability --- components/driver/dac/dac_continuous.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/components/driver/dac/dac_continuous.c b/components/driver/dac/dac_continuous.c index fc5b75673e..09b25d2136 100644 --- a/components/driver/dac/dac_continuous.c +++ b/components/driver/dac/dac_continuous.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -429,7 +429,7 @@ esp_err_t dac_continuous_start_async_writing(dac_continuous_handle_t handle) if (atomic_load(&handle->is_cyclic)) { /* Break the DMA descriptor chain to stop the DMA first */ for (int i = 0; i < handle->cfg.desc_num; i++) { - handle->desc[i]->empty = 0; + STAILQ_NEXT(handle->desc[i], qe) = NULL; } } /* Wait for the previous DMA stop */ @@ -438,7 +438,7 @@ esp_err_t dac_continuous_start_async_writing(dac_continuous_handle_t handle) /* Link all descriptors as a ring */ for (int i = 0; i < handle->cfg.desc_num; i++) { memset(handle->bufs[i], 0, handle->cfg.buf_size); - handle->desc[i]->empty = (uint32_t)(i < handle->cfg.desc_num - 1 ? handle->desc[i + 1] : handle->desc[0]); + STAILQ_NEXT(handle->desc[i], qe) = (i < handle->cfg.desc_num - 1) ? handle->desc[i + 1] : handle->desc[0]; } dac_dma_periph_dma_trans_start((uint32_t)handle->desc[0]); atomic_store(&handle->is_running, true); @@ -453,7 +453,7 @@ esp_err_t dac_continuous_stop_async_writing(dac_continuous_handle_t handle) /* Break the DMA descriptor chain to stop the DMA first */ for (int i = 0; i < handle->cfg.desc_num; i++) { - handle->desc[i]->empty = 0; + STAILQ_NEXT(handle->desc[i], qe) = NULL; } /* Wait for the previous DMA stop */ while (atomic_load(&handle->is_running)) {} @@ -526,7 +526,7 @@ esp_err_t dac_continuous_write_cyclically(dac_continuous_handle_t handle, uint8_ if (atomic_load(&handle->is_cyclic)) { /* Break the DMA descriptor chain to stop the DMA first */ for (int i = 0; i < handle->cfg.desc_num; i++) { - handle->desc[i]->empty = 0; + STAILQ_NEXT(handle->desc[i], qe) = NULL; } } /* Wait for the previous DMA stop */ @@ -542,12 +542,12 @@ esp_err_t dac_continuous_write_cyclically(dac_continuous_handle_t handle, uint8_ size_t load_bytes = s_dac_load_data_into_buf(handle, handle->bufs[i], handle->cfg.buf_size, buf, buf_size / split); lldesc_config(handle->desc[i], LLDESC_HW_OWNED, 1, 0, load_bytes); /* Link to the next descriptor */ - handle->desc[i]->empty = (uint32_t)(i < handle->cfg.desc_num - 1 ? handle->desc[i + 1] :0); + STAILQ_NEXT(handle->desc[i], qe) = (i < handle->cfg.desc_num - 1) ? handle->desc[i + 1] : NULL; buf_size -= load_bytes / DAC_16BIT_ALIGN_COEFF; buf += load_bytes / DAC_16BIT_ALIGN_COEFF; } /* Link the tail to the head as a ring */ - handle->desc[i-1]->empty = (uint32_t)(handle->desc[0]); + STAILQ_NEXT(handle->desc[i-1], qe) = handle->desc[0]; dac_dma_periph_dma_trans_start((uint32_t)handle->desc[0]); atomic_store(&handle->is_running, true); @@ -610,7 +610,7 @@ esp_err_t dac_continuous_write(dac_continuous_handle_t handle, uint8_t *buf, siz xQueueReset(handle->desc_pool); /* Break the chain if DMA still running */ for (int i = 0; i < handle->cfg.desc_num; i++) { - handle->desc[i]->empty = 0; + STAILQ_NEXT(handle->desc[i], qe) = NULL; xQueueSend(handle->desc_pool, &handle->desc[i], 0); } STAILQ_INIT(&handle->head);