From 4e2a32d9b34bafb00916017fb0867a3569bbf121 Mon Sep 17 00:00:00 2001 From: Li Shuai Date: Tue, 17 Jan 2023 18:49:02 +0800 Subject: [PATCH] soc_cap: add SOC_PM_SUPPORT_VDDSDIO_PD soc_caps soc_cap: add SOC_PM_CPU_RETENTION_BY_SW/REGDMA soc caps: add SOC_PMU_SUPPORTED --- .../soc/esp32/include/soc/Kconfig.soc_caps.in | 4 +++ components/soc/esp32/include/soc/soc_caps.h | 1 + .../esp32c2/include/soc/Kconfig.soc_caps.in | 4 +++ components/soc/esp32c2/include/soc/soc_caps.h | 1 + .../esp32c3/include/soc/Kconfig.soc_caps.in | 8 +++++ components/soc/esp32c3/include/soc/soc_caps.h | 3 ++ .../esp32c6/include/soc/Kconfig.soc_caps.in | 34 ++++++++++++------- components/soc/esp32c6/include/soc/soc_caps.h | 32 +++++++---------- .../esp32h2/include/soc/Kconfig.soc_caps.in | 8 +++++ components/soc/esp32h2/include/soc/soc_caps.h | 3 +- .../esp32s2/include/soc/Kconfig.soc_caps.in | 4 +++ components/soc/esp32s2/include/soc/soc_caps.h | 1 + .../esp32s3/include/soc/Kconfig.soc_caps.in | 8 +++++ components/soc/esp32s3/include/soc/soc_caps.h | 3 ++ 14 files changed, 81 insertions(+), 33 deletions(-) diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index fdba1a66e4..2f0f687b25 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -743,6 +743,10 @@ config SOC_PM_SUPPORT_RC_FAST_PD bool default y +config SOC_PM_SUPPORT_VDDSDIO_PD + bool + default y + config SOC_CLK_APLL_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index f0c8ceed68..cded5d102d 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -373,6 +373,7 @@ #define SOC_PM_SUPPORT_RTC_FAST_MEM_PD (1) #define SOC_PM_SUPPORT_RTC_SLOW_MEM_PD (1) #define SOC_PM_SUPPORT_RC_FAST_PD (1) +#define SOC_PM_SUPPORT_VDDSDIO_PD (1) /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/ #define SOC_CLK_APLL_SUPPORTED (1) diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index beb59bbec8..63a076c011 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -607,6 +607,10 @@ config SOC_PM_SUPPORT_RC_FAST_PD bool default y +config SOC_PM_SUPPORT_VDDSDIO_PD + bool + default y + config SOC_CLK_RC_FAST_D256_SUPPORTED bool default y diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index ff1e37c06e..a7fdb1db60 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -289,6 +289,7 @@ #define SOC_PM_SUPPORT_WIFI_PD (0) #define SOC_PM_SUPPORT_BT_PD (0) #define SOC_PM_SUPPORT_RC_FAST_PD (1) +#define SOC_PM_SUPPORT_VDDSDIO_PD (1) /*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */ #define SOC_CLK_RC_FAST_D256_SUPPORTED (1) diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index db80787dc3..ec92b0171e 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -863,6 +863,14 @@ config SOC_PM_SUPPORT_RC_FAST_PD bool default y +config SOC_PM_SUPPORT_VDDSDIO_PD + bool + default y + +config SOC_PM_CPU_RETENTION_BY_RTCCNTL + bool + default y + config SOC_CLK_RC_FAST_D256_SUPPORTED bool default y diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index d68a455cdf..eb5d1ef03e 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -383,6 +383,9 @@ #define SOC_PM_SUPPORT_WIFI_PD (1) #define SOC_PM_SUPPORT_BT_PD (1) #define SOC_PM_SUPPORT_RC_FAST_PD (1) +#define SOC_PM_SUPPORT_VDDSDIO_PD (1) + +#define SOC_PM_CPU_RETENTION_BY_RTCCNTL (1) /*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */ #define SOC_CLK_RC_FAST_D256_SUPPORTED (1) diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index e29c80be02..f7ffb86ce6 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -147,6 +147,14 @@ config SOC_APM_SUPPORTED bool default y +config SOC_PMU_SUPPORTED + bool + default y + +config SOC_LP_TIMER_SUPPORTED + bool + default y + config SOC_XTAL_SUPPORT_40M bool default y @@ -659,14 +667,6 @@ config SOC_MCPWM_CLK_SUPPORT_XTAL bool default y -config SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH - int - default 128 - -config SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM - int - default 108 - config SOC_RSA_MAX_BIT_LEN int default 3072 @@ -963,6 +963,10 @@ config SOC_UART_SUPPORT_XTAL_CLK bool default y +config SOC_UART_SUPPORT_WAKEUP_INT + bool + default y + config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND bool default y @@ -991,11 +995,7 @@ config SOC_PM_SUPPORT_CPU_PD bool default y -config SOC_PM_SUPPORT_WIFI_PD - bool - default y - -config SOC_PM_SUPPORT_BT_PD +config SOC_PM_SUPPORT_MODEM_PD bool default y @@ -1011,10 +1011,18 @@ config SOC_PM_SUPPORT_RC_FAST_PD bool default y +config SOC_PM_SUPPORT_VDDSDIO_PD + bool + default y + config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY bool default y +config SOC_PM_CPU_RETENTION_BY_SW + bool + default y + config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index dc40251e6c..66d625c26a 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -63,6 +63,8 @@ #define SOC_SDIO_SLAVE_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1 #define SOC_APM_SUPPORTED 1 +#define SOC_PMU_SUPPORTED 1 +#define SOC_LP_TIMER_SUPPORTED 1 /*-------------------------- XTAL CAPS ---------------------------------------*/ #define SOC_XTAL_SUPPORT_40M 1 @@ -281,15 +283,6 @@ #define SOC_MCPWM_CLK_SUPPORT_PLL160M (1) ///< Support PLL160M as clock source #define SOC_MCPWM_CLK_SUPPORT_XTAL (1) ///< Support XTAL as clock source -// TODO: IDF-5348 (Copy from esp32c3, need check) -/*-------------------------- RTC CAPS --------------------------------------*/ -#define SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH (128) -#define SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM (108) -#define SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3) -#define SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3) - -#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3)) - // TODO: IDF-5359 (Copy from esp32c3, need check) /*--------------------------- RSA CAPS ---------------------------------------*/ #define SOC_RSA_MAX_BIT_LEN (3072) @@ -410,14 +403,13 @@ // TODO: IDF-5338 (Copy from esp32c3, need check) /*-------------------------- UART CAPS ---------------------------------------*/ // ESP32-C6 has 2 UARTs -#define SOC_UART_NUM (2) -#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */ -#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */ - -#define SOC_UART_SUPPORT_PLL_F80M_CLK (1) /*!< Support PLL_DIV as the clock source */ -#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */ -#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */ -// #define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */ // TODO: Test UART wakeup while supporting sleep +#define SOC_UART_NUM (2) +#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */ +#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */ +#define SOC_UART_SUPPORT_PLL_F80M_CLK (1) /*!< Support PLL_DIV as the clock source */ +#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */ +#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */ +#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */ // TODO: Test UART wakeup while supporting sleep // UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled #define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1) @@ -438,14 +430,16 @@ #define SOC_PM_SUPPORT_WIFI_WAKEUP (1) #define SOC_PM_SUPPORT_BT_WAKEUP (1) #define SOC_PM_SUPPORT_CPU_PD (1) -#define SOC_PM_SUPPORT_WIFI_PD (1) -#define SOC_PM_SUPPORT_BT_PD (1) +#define SOC_PM_SUPPORT_MODEM_PD (1) #define SOC_PM_SUPPORT_XTAL32K_PD (1) #define SOC_PM_SUPPORT_RC32K_PD (1) #define SOC_PM_SUPPORT_RC_FAST_PD (1) +#define SOC_PM_SUPPORT_VDDSDIO_PD (1) #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!