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fix(esp_hw_support): fix cache safe check function

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wuzhenghui
2024-02-26 15:20:14 +08:00
committed by BOT
parent 12de4603c0
commit 4e731e8612
2 changed files with 7 additions and 1 deletions
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1
components/esp_hw_support/Kconfig
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@@ -173,6 +173,7 @@ menu "Hardware Settings"
config ESP_SLEEP_CACHE_SAFE_ASSERTION config ESP_SLEEP_CACHE_SAFE_ASSERTION
bool "Check the cache safety of the sleep wakeup code in sleep process" bool "Check the cache safety of the sleep wakeup code in sleep process"
default n default n
select ESP_PANIC_HANDLER_IRAM
help help
Enabling it will check the cache safety of the code before the flash power is ready after Enabling it will check the cache safety of the code before the flash power is ready after
light sleep wakeup, and check PM_SLP_IRAM_OPT related code cache safety. This option is light sleep wakeup, and check PM_SLP_IRAM_OPT related code cache safety. This option is

7
components/esp_hw_support/sleep_modes.c
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@@ -509,7 +509,12 @@ FORCE_INLINE_ATTR bool light_sleep_uart_prepare(uint32_t pd_flags, int64_t sleep
#if !SOC_PM_SUPPORT_TOP_PD || !CONFIG_ESP_CONSOLE_UART #if !SOC_PM_SUPPORT_TOP_PD || !CONFIG_ESP_CONSOLE_UART
suspend_uarts(); suspend_uarts();
#else #else
if (pd_flags & PMU_SLEEP_PD_TOP) { #ifdef CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION
#define FORCE_FLUSH_CONSOLE_UART 1
#else
#define FORCE_FLUSH_CONSOLE_UART 0
#endif
if (FORCE_FLUSH_CONSOLE_UART || (pd_flags & PMU_SLEEP_PD_TOP)) {
if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) && if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) &&
// +1 is for cover the last character flush time // +1 is for cover the last character flush time
(sleep_duration < (int64_t)((UART_LL_FIFO_DEF_LEN - uart_ll_get_txfifo_len(CONSOLE_UART_DEV) + 1) * UART_FLUSH_US_PER_CHAR) + SLEEP_UART_FLUSH_DONE_TO_SLEEP_US)) { (sleep_duration < (int64_t)((UART_LL_FIFO_DEF_LEN - uart_ll_get_txfifo_len(CONSOLE_UART_DEV) + 1) * UART_FLUSH_US_PER_CHAR) + SLEEP_UART_FLUSH_DONE_TO_SLEEP_US)) {