forked from espressif/esp-idf
change(sdmmc): replace periph_module_x with rcc
This commit is contained in:
committed by
Armando (Dou Yiwen)
parent
2d3736fa11
commit
4eaf233bb8
@ -29,16 +29,23 @@
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#include "hal/sdmmc_hal.h"
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#include "hal/sdmmc_hal.h"
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#include "hal/sdmmc_ll.h"
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#include "hal/sdmmc_ll.h"
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#define SDMMC_EVENT_QUEUE_LENGTH 32
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#define SDMMC_EVENT_QUEUE_LENGTH 32
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#define SDMMC_CLK_NEEDS_RCC CONFIG_IDF_TARGET_ESP32P4
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#if SDMMC_CLK_NEEDS_RCC
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#if !SOC_RCC_IS_INDEPENDENT
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// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
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// Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section
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#define SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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#define SDMMC_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
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#else
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#else
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#define SDMMC_RCC_ATOMIC()
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#define SDMMC_RCC_ATOMIC()
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#endif
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#endif
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#if SOC_PERIPH_CLK_CTRL_SHARED
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// Clock source and related clock settings are mixing with other peripherals, so we need to use a critical section
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#define SDMMC_CLK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
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#else
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#define SDMMC_CLK_SRC_ATOMIC()
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#endif
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static const char *TAG = "sdmmc_periph";
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static const char *TAG = "sdmmc_periph";
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/**
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/**
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@ -119,7 +126,7 @@ esp_err_t sdmmc_host_reset(void)
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*/
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*/
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static void sdmmc_host_set_clk_div(int div)
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static void sdmmc_host_set_clk_div(int div)
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{
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{
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SDMMC_RCC_ATOMIC() {
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SDMMC_CLK_SRC_ATOMIC() {
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sdmmc_ll_set_clock_div(s_host_ctx.hal.dev, div);
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sdmmc_ll_set_clock_div(s_host_ctx.hal.dev, div);
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sdmmc_ll_select_clk_source(s_host_ctx.hal.dev, SDMMC_CLK_SRC_DEFAULT);
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sdmmc_ll_select_clk_source(s_host_ctx.hal.dev, SDMMC_CLK_SRC_DEFAULT);
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sdmmc_ll_init_phase_delay(s_host_ctx.hal.dev);
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sdmmc_ll_init_phase_delay(s_host_ctx.hal.dev);
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@ -325,7 +332,7 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
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delay_phase_num = 0;
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delay_phase_num = 0;
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break;
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break;
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}
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}
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SDMMC_RCC_ATOMIC() {
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SDMMC_CLK_SRC_ATOMIC() {
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sdmmc_ll_set_din_delay(s_host_ctx.hal.dev, phase);
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sdmmc_ll_set_din_delay(s_host_ctx.hal.dev, phase);
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}
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}
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@ -379,15 +386,10 @@ esp_err_t sdmmc_host_init(void)
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}
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}
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//enable bus clock for registers
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//enable bus clock for registers
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#if SDMMC_CLK_NEEDS_RCC
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SDMMC_RCC_ATOMIC() {
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SDMMC_RCC_ATOMIC() {
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sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, true);
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sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, true);
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sdmmc_ll_reset_register(s_host_ctx.hal.dev);
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sdmmc_ll_reset_register(s_host_ctx.hal.dev);
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}
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}
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#else
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periph_module_reset(PERIPH_SDMMC_MODULE);
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periph_module_enable(PERIPH_SDMMC_MODULE);
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#endif
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//hal context init
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//hal context init
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sdmmc_hal_init(&s_host_ctx.hal);
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sdmmc_hal_init(&s_host_ctx.hal);
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@ -678,14 +680,10 @@ esp_err_t sdmmc_host_deinit(void)
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s_host_ctx.io_intr_event = NULL;
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s_host_ctx.io_intr_event = NULL;
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sdmmc_ll_deinit_clk(s_host_ctx.hal.dev);
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sdmmc_ll_deinit_clk(s_host_ctx.hal.dev);
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sdmmc_host_transaction_handler_deinit();
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sdmmc_host_transaction_handler_deinit();
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#if SDMMC_CLK_NEEDS_RCC
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//disable bus clock for registers
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//disable bus clock for registers
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SDMMC_RCC_ATOMIC() {
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SDMMC_RCC_ATOMIC() {
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sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, false);
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sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, false);
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}
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}
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#else
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periph_module_disable(PERIPH_SDMMC_MODULE);
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#endif
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return ESP_OK;
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return ESP_OK;
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}
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}
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@ -18,6 +18,7 @@
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#include "hal/assert.h"
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#include "hal/assert.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/sdmmc_struct.h"
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#include "soc/sdmmc_struct.h"
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#include "soc/dport_reg.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -40,6 +41,41 @@ typedef enum {
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SDMMC_LL_DELAY_PHASE_3,
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SDMMC_LL_DELAY_PHASE_3,
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} sdmmc_ll_delay_phase_t;
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} sdmmc_ll_delay_phase_t;
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/**
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* @brief Enable the bus clock for SDMMC module
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*
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* @param hw hardware instance address
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* @param en enable / disable
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*/
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static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
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{
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if (en) {
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DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_SDIO_HOST_EN);
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} else {
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DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_SDIO_HOST_EN);
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}
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define sdmmc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; sdmmc_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* @brief Reset the SDMMC module
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*
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* @param hw hardware instance address
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*/
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static inline void sdmmc_ll_reset_register(sdmmc_dev_t *hw)
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{
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DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SDIO_HOST_RST);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, DPORT_SDIO_HOST_RST);
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define sdmmc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; sdmmc_ll_reset_register(__VA_ARGS__)
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/**
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/**
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* @brief Select SDMMC clock source
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* @brief Select SDMMC clock source
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*
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*
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@ -18,6 +18,7 @@
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#include "hal/assert.h"
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#include "hal/assert.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/clk_tree_defs.h"
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#include "soc/sdmmc_struct.h"
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#include "soc/sdmmc_struct.h"
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#include "soc/system_struct.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@ -39,6 +40,37 @@ typedef enum {
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SDMMC_LL_DELAY_PHASE_3,
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SDMMC_LL_DELAY_PHASE_3,
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} sdmmc_ll_delay_phase_t;
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} sdmmc_ll_delay_phase_t;
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/**
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* @brief Enable the bus clock for SDMMC module
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*
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* @param hw hardware instance address
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* @param en enable / disable
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*/
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static inline void sdmmc_ll_enable_bus_clock(sdmmc_dev_t *hw, bool en)
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{
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SYSTEM.perip_clk_en1.sdio_host_clk_en = en;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define sdmmc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; sdmmc_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* @brief Reset the SDMMC module
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*
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* @param hw hardware instance address
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*/
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static inline void sdmmc_ll_reset_register(sdmmc_dev_t *hw)
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{
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SYSTEM.perip_rst_en1.sdio_host_rst = 1;
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SYSTEM.perip_rst_en1.sdio_host_rst = 0;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define sdmmc_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; sdmmc_ll_reset_register(__VA_ARGS__)
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/**
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/**
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* @brief Select SDMMC clock source
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* @brief Select SDMMC clock source
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*
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*
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