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fix(lp_uart): Update the lp_core_uart_tx_flush() API to wait for Tx idle

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This commit updates the lp_core_uart_tx_flush() API to wait for the Tx line
to become idle, therefore confirming that all bytes are sent out.

Closes https://github.com/espressif/esp-idf/issues/15433
This commit is contained in:
Sudeep Mohanty
2025-02-28 10:27:52 +01:00
parent d4aa25a38e
commit 528b1b3c37
1 changed files with 2 additions and 2 deletions
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4
components/ulp/lp_core/lp_core/lp_core_uart.c
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@@ -68,9 +68,9 @@ void lp_core_uart_tx_flush(uart_port_t lp_uart_num)
(void)lp_uart_num; (void)lp_uart_num;
int loop_cnt = 0; int loop_cnt = 0;
if (uart_ll_is_enabled(LP_UART_NUM_0) && !uart_hal_is_tx_idle(&hal)) { if (uart_ll_is_enabled(LP_UART_NUM_0)) {
/* Wait for the Tx FIFO to be empty */ /* Wait for the Tx FIFO to be empty */
while (!(uart_hal_get_intraw_mask(&hal) & (LP_UART_TX_INT_FLAG | LP_UART_ERR_INT_FLAG))) { while (!(uart_hal_get_intraw_mask(&hal) & (LP_UART_TX_INT_FLAG | LP_UART_ERR_INT_FLAG) && uart_hal_is_tx_idle(&hal))) {
loop_cnt++; loop_cnt++;
if (loop_cnt > 10000) { if (loop_cnt > 10000) {
/* Bail out */ /* Bail out */