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feat(esp_security/crypto): Create a generic crypto locking layer across targets

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This commit is contained in:
harshal.patil
2024-07-10 14:24:54 +05:30
committed by Mahavir Jain
parent 488b2a741d
commit 57db17bec2
10 changed files with 45 additions and 532 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
components/esp_security/CMakeLists.txt
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@@ -10,7 +10,7 @@ if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "src/crypto/esp_dpa_protection.c") list(APPEND srcs "src/crypto/esp_dpa_protection.c")
endif() endif()
list(APPEND srcs "src/crypto/${IDF_TARGET}/esp_crypto_lock.c") list(APPEND srcs "src/crypto/esp_crypto_lock.c")
endif() endif()
idf_component_register(SRCS ${srcs} idf_component_register(SRCS ${srcs}

27
components/esp_security/src/crypto/esp32/esp_crypto_lock.c
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@@ -1,27 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
MPI/RSA: independent
*/
/* Lock for the MPI/RSA peripheral */
static _lock_t s_crypto_mpi_lock;
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}

26
components/esp_security/src/crypto/esp32c2/esp_crypto_lock.c
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@@ -1,26 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
ECC: independent
*/
/* Lock for ECC peripheral */
static _lock_t s_crypto_ecc_lock;
void esp_crypto_ecc_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecc_lock);
}
void esp_crypto_ecc_lock_release(void)
{
_lock_release(&s_crypto_ecc_lock);
}

75
components/esp_security/src/crypto/esp32c3/esp_crypto_lock.c
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@@ -1,75 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
SHA: peripheral independent, but DMA is shared with AES
AES: peripheral independent, but DMA is shared with SHA
MPI/RSA: independent
HMAC: needs SHA
DS: needs HMAC (which needs SHA), AES and MPI
*/
/* Lock for DS peripheral */
static _lock_t s_crypto_ds_lock;
/* Lock for HMAC peripheral */
static _lock_t s_crypto_hmac_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
/* Single lock for SHA and AES, sharing a reserved GDMA channel */
static _lock_t s_crypto_sha_aes_lock;
void esp_crypto_hmac_lock_acquire(void)
{
_lock_acquire(&s_crypto_hmac_lock);
esp_crypto_sha_aes_lock_acquire();
}
void esp_crypto_hmac_lock_release(void)
{
esp_crypto_sha_aes_lock_release();
_lock_release(&s_crypto_hmac_lock);
}
void esp_crypto_ds_lock_acquire(void)
{
_lock_acquire(&s_crypto_ds_lock);
esp_crypto_hmac_lock_acquire();
esp_crypto_mpi_lock_acquire();
}
void esp_crypto_ds_lock_release(void)
{
esp_crypto_mpi_lock_release();
esp_crypto_hmac_lock_release();
_lock_release(&s_crypto_ds_lock);
}
void esp_crypto_sha_aes_lock_acquire(void)
{
_lock_acquire(&s_crypto_sha_aes_lock);
}
void esp_crypto_sha_aes_lock_release(void)
{
_lock_release(&s_crypto_sha_aes_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}

104
components/esp_security/src/crypto/esp32c5/esp_crypto_lock.c
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@@ -1,104 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
SHA: peripheral independent, but DMA is shared with AES
AES: peripheral independent, but DMA is shared with SHA
MPI/RSA: independent
ECC: independent
HMAC: needs SHA
DS: needs HMAC (which needs SHA), AES and MPI
*/
/* Lock for DS peripheral */
static _lock_t s_crypto_ds_lock;
/* Lock for HMAC peripheral */
static _lock_t s_crypto_hmac_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
/* Single lock for SHA and AES, sharing a reserved GDMA channel */
static _lock_t s_crypto_sha_aes_lock;
/* Lock for ECC peripheral */
static _lock_t s_crypto_ecc_lock;
/* Lock for ECDSA peripheral */
static _lock_t s_crypto_ecdsa_lock;
void esp_crypto_hmac_lock_acquire(void)
{
_lock_acquire(&s_crypto_hmac_lock);
esp_crypto_sha_aes_lock_acquire();
}
void esp_crypto_hmac_lock_release(void)
{
esp_crypto_sha_aes_lock_release();
_lock_release(&s_crypto_hmac_lock);
}
void esp_crypto_ds_lock_acquire(void)
{
_lock_acquire(&s_crypto_ds_lock);
esp_crypto_hmac_lock_acquire();
esp_crypto_mpi_lock_acquire();
}
void esp_crypto_ds_lock_release(void)
{
esp_crypto_mpi_lock_release();
esp_crypto_hmac_lock_release();
_lock_release(&s_crypto_ds_lock);
}
void esp_crypto_sha_aes_lock_acquire(void)
{
_lock_acquire(&s_crypto_sha_aes_lock);
}
void esp_crypto_sha_aes_lock_release(void)
{
_lock_release(&s_crypto_sha_aes_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}
void esp_crypto_ecc_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecc_lock);
}
void esp_crypto_ecc_lock_release(void)
{
_lock_release(&s_crypto_ecc_lock);
}
void esp_crypto_ecdsa_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecdsa_lock);
esp_crypto_ecc_lock_acquire();
}
void esp_crypto_ecdsa_lock_release(void)
{
esp_crypto_ecc_lock_release();
_lock_release(&s_crypto_ecdsa_lock);
}

89
components/esp_security/src/crypto/esp32c6/esp_crypto_lock.c
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@@ -1,89 +0,0 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
SHA: peripheral independent, but DMA is shared with AES
AES: peripheral independent, but DMA is shared with SHA
MPI/RSA: independent
ECC: independent
HMAC: needs SHA
DS: needs HMAC (which needs SHA), AES and MPI
*/
/* Lock for DS peripheral */
static _lock_t s_crypto_ds_lock;
/* Lock for HMAC peripheral */
static _lock_t s_crypto_hmac_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
/* Single lock for SHA and AES, sharing a reserved GDMA channel */
static _lock_t s_crypto_sha_aes_lock;
/* Lock for ECC peripheral */
static _lock_t s_crypto_ecc_lock;
void esp_crypto_hmac_lock_acquire(void)
{
_lock_acquire(&s_crypto_hmac_lock);
esp_crypto_sha_aes_lock_acquire();
}
void esp_crypto_hmac_lock_release(void)
{
esp_crypto_sha_aes_lock_release();
_lock_release(&s_crypto_hmac_lock);
}
void esp_crypto_ds_lock_acquire(void)
{
_lock_acquire(&s_crypto_ds_lock);
esp_crypto_hmac_lock_acquire();
esp_crypto_mpi_lock_acquire();
}
void esp_crypto_ds_lock_release(void)
{
esp_crypto_mpi_lock_release();
esp_crypto_hmac_lock_release();
_lock_release(&s_crypto_ds_lock);
}
void esp_crypto_sha_aes_lock_acquire(void)
{
_lock_acquire(&s_crypto_sha_aes_lock);
}
void esp_crypto_sha_aes_lock_release(void)
{
_lock_release(&s_crypto_sha_aes_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}
void esp_crypto_ecc_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecc_lock);
}
void esp_crypto_ecc_lock_release(void)
{
_lock_release(&s_crypto_ecc_lock);
}

107
components/esp_security/src/crypto/esp32h2/esp_crypto_lock.c
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@@ -1,107 +0,0 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
SHA: peripheral independent, but DMA is shared with AES
AES: peripheral independent, but DMA is shared with SHA
MPI/RSA: independent
ECC: independent
HMAC: needs SHA
DS: needs HMAC (which needs SHA), AES and MPI
ECDSA: needs ECC and MPI
*/
/* Lock for DS peripheral */
static _lock_t s_crypto_ds_lock;
/* Lock for HMAC peripheral */
static _lock_t s_crypto_hmac_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
/* Single lock for SHA and AES, sharing a reserved GDMA channel */
static _lock_t s_crypto_sha_aes_lock;
/* Lock for ECC peripheral */
static _lock_t s_crypto_ecc_lock;
/* Lock for ECDSA peripheral */
static _lock_t s_crypto_ecdsa_lock;
void esp_crypto_hmac_lock_acquire(void)
{
_lock_acquire(&s_crypto_hmac_lock);
esp_crypto_sha_aes_lock_acquire();
}
void esp_crypto_hmac_lock_release(void)
{
esp_crypto_sha_aes_lock_release();
_lock_release(&s_crypto_hmac_lock);
}
void esp_crypto_ds_lock_acquire(void)
{
_lock_acquire(&s_crypto_ds_lock);
esp_crypto_hmac_lock_acquire();
esp_crypto_mpi_lock_acquire();
}
void esp_crypto_ds_lock_release(void)
{
esp_crypto_mpi_lock_release();
esp_crypto_hmac_lock_release();
_lock_release(&s_crypto_ds_lock);
}
void esp_crypto_sha_aes_lock_acquire(void)
{
_lock_acquire(&s_crypto_sha_aes_lock);
}
void esp_crypto_sha_aes_lock_release(void)
{
_lock_release(&s_crypto_sha_aes_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}
void esp_crypto_ecc_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecc_lock);
}
void esp_crypto_ecc_lock_release(void)
{
_lock_release(&s_crypto_ecc_lock);
}
void esp_crypto_ecdsa_lock_acquire(void)
{
_lock_acquire(&s_crypto_ecdsa_lock);
esp_crypto_ecc_lock_acquire();
esp_crypto_mpi_lock_acquire();
}
void esp_crypto_ecdsa_lock_release(void)
{
esp_crypto_mpi_lock_release();
esp_crypto_ecc_lock_release();
_lock_release(&s_crypto_ecdsa_lock);
}

36
components/esp_security/src/crypto/esp32s2/esp_crypto_lock.c
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@@ -1,36 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Single lock for SHA and AES engine which both use the crypto DMA */
static _lock_t s_crypto_dma_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
void esp_crypto_dma_lock_acquire(void)
{
_lock_acquire(&s_crypto_dma_lock);
}
void esp_crypto_dma_lock_release(void)
{
_lock_release(&s_crypto_dma_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}

67
components/esp_security/src/crypto/esp32s3/esp_crypto_lock.c
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@@ -1,67 +0,0 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/lock.h>
#include "esp_crypto_lock.h"
/* Lock overview:
SHA: peripheral independent, but DMA is shared with AES
AES: peripheral independent, but DMA is shared with SHA
MPI/RSA: independent
HMAC: needs SHA
DS: needs HMAC (which needs SHA), AES and MPI
*/
/*
* Single lock for SHA, HMAC, DS and AES peripherals.
* SHA and AES share a reserved GDMA channel.
* DS uses HMAC, HMAC uses SHA, so they may also not be used simulaneously.
*/
static _lock_t s_crypto_sha_aes_hmac_ds_lock;
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock;
void esp_crypto_ds_lock_acquire(void)
{
_lock_acquire_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_ds_lock_release(void)
{
_lock_release_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_hmac_lock_acquire(void)
{
_lock_acquire_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_hmac_lock_release(void)
{
_lock_release_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_sha_aes_lock_acquire(void)
{
_lock_acquire_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_sha_aes_lock_release(void)
{
_lock_release_recursive(&s_crypto_sha_aes_hmac_ds_lock);
}
void esp_crypto_mpi_lock_acquire(void)
{
_lock_acquire(&s_crypto_mpi_lock);
}
void esp_crypto_mpi_lock_release(void)
{
_lock_release(&s_crypto_mpi_lock);
}

44
components/esp_security/src/crypto/esp32p4/esp_crypto_lock.c → components/esp_security/src/crypto/esp_crypto_lock.c
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@@ -18,27 +18,42 @@ DS: needs HMAC (which needs SHA), AES and MPI
ECDSA: needs ECC and MPI ECDSA: needs ECC and MPI
*/ */
#ifdef SOC_DIG_SIGN_SUPPORTED
/* Lock for DS peripheral */ /* Lock for DS peripheral */
static _lock_t s_crypto_ds_lock; static _lock_t s_crypto_ds_lock;
#endif /* SOC_DIG_SIGN_SUPPORTED */
#ifdef SOC_HMAC_SUPPORTED
/* Lock for HMAC peripheral */ /* Lock for HMAC peripheral */
static _lock_t s_crypto_hmac_lock; static _lock_t s_crypto_hmac_lock;
#endif /* SOC_HMAC_SUPPORTED */
#ifdef SOC_MPI_SUPPORTED
/* Lock for the MPI/RSA peripheral, also used by the DS peripheral */ /* Lock for the MPI/RSA peripheral, also used by the DS peripheral */
static _lock_t s_crypto_mpi_lock; static _lock_t s_crypto_mpi_lock;
#endif /* SOC_MPI_SUPPORTED */
#if defined(SOC_SHA_SUPPORTED) && defined(SOC_AES_SUPPORTED)
/* Single lock for SHA and AES, sharing a reserved GDMA channel */ /* Single lock for SHA and AES, sharing a reserved GDMA channel */
static _lock_t s_crypto_sha_aes_lock; static _lock_t s_crypto_sha_aes_lock;
#endif /* defined(SOC_SHA_SUPPORTED) && defined(SOC_AES_SUPPORTED) */
#ifdef SOC_ECC_SUPPORTED
/* Lock for ECC peripheral */ /* Lock for ECC peripheral */
static _lock_t s_crypto_ecc_lock; static _lock_t s_crypto_ecc_lock;
#endif /* SOC_ECC_SUPPORTED */
#ifdef SOC_ECDSA_SUPPORTED
/* Lock for ECDSA peripheral */ /* Lock for ECDSA peripheral */
static _lock_t s_crypto_ecdsa_lock; static _lock_t s_crypto_ecdsa_lock;
#endif /* SOC_ECDSA_SUPPORTED */
#ifdef SOC_KEY_MANAGER_SUPPORTED
/* Lock for Key Manager peripheral */ /* Lock for Key Manager peripheral */
static _lock_t s_crypto_key_manager_lock; static _lock_t s_crypto_key_manager_lock;
#endif /* SOC_KEY_MANAGER_SUPPORTED */
#ifdef SOC_HMAC_SUPPORTED
void esp_crypto_hmac_lock_acquire(void) void esp_crypto_hmac_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_hmac_lock); _lock_acquire(&s_crypto_hmac_lock);
@@ -50,7 +65,9 @@ void esp_crypto_hmac_lock_release(void)
esp_crypto_sha_aes_lock_release(); esp_crypto_sha_aes_lock_release();
_lock_release(&s_crypto_hmac_lock); _lock_release(&s_crypto_hmac_lock);
} }
#endif /* SOC_HMAC_SUPPORTED */
#ifdef SOC_DIG_SIGN_SUPPORTED
void esp_crypto_ds_lock_acquire(void) void esp_crypto_ds_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_ds_lock); _lock_acquire(&s_crypto_ds_lock);
@@ -64,7 +81,9 @@ void esp_crypto_ds_lock_release(void)
esp_crypto_hmac_lock_release(); esp_crypto_hmac_lock_release();
_lock_release(&s_crypto_ds_lock); _lock_release(&s_crypto_ds_lock);
} }
#endif /* SOC_DIG_SIGN_SUPPORTED */
#if defined(SOC_SHA_SUPPORTED) && defined(SOC_AES_SUPPORTED)
void esp_crypto_sha_aes_lock_acquire(void) void esp_crypto_sha_aes_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_sha_aes_lock); _lock_acquire(&s_crypto_sha_aes_lock);
@@ -74,7 +93,21 @@ void esp_crypto_sha_aes_lock_release(void)
{ {
_lock_release(&s_crypto_sha_aes_lock); _lock_release(&s_crypto_sha_aes_lock);
} }
#endif /* defined(SOC_SHA_SUPPORTED) && defined(SOC_AES_SUPPORTED) */
#if defined(SOC_SHA_CRYPTO_DMA) && defined(SOC_AES_CRYPTO_DMA)
void esp_crypto_dma_lock_acquire(void)
{
_lock_acquire(&s_crypto_sha_aes_lock);
}
void esp_crypto_dma_lock_release(void)
{
_lock_release(&s_crypto_sha_aes_lock);
}
#endif /* defined(SOC_SHA_CRYPTO_DMA) && defined(SOC_AES_CRYPTO_DMA) */
#ifdef SOC_MPI_SUPPORTED
void esp_crypto_mpi_lock_acquire(void) void esp_crypto_mpi_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_mpi_lock); _lock_acquire(&s_crypto_mpi_lock);
@@ -84,7 +117,9 @@ void esp_crypto_mpi_lock_release(void)
{ {
_lock_release(&s_crypto_mpi_lock); _lock_release(&s_crypto_mpi_lock);
} }
#endif /* SOC_MPI_SUPPORTED */
#ifdef SOC_ECC_SUPPORTED
void esp_crypto_ecc_lock_acquire(void) void esp_crypto_ecc_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_ecc_lock); _lock_acquire(&s_crypto_ecc_lock);
@@ -94,21 +129,29 @@ void esp_crypto_ecc_lock_release(void)
{ {
_lock_release(&s_crypto_ecc_lock); _lock_release(&s_crypto_ecc_lock);
} }
#endif /* SOC_ECC_SUPPORTED */
#ifdef SOC_ECDSA_SUPPORTED
void esp_crypto_ecdsa_lock_acquire(void) void esp_crypto_ecdsa_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_ecdsa_lock); _lock_acquire(&s_crypto_ecdsa_lock);
esp_crypto_ecc_lock_acquire(); esp_crypto_ecc_lock_acquire();
#ifdef SOC_ECDSA_USES_MPI
esp_crypto_mpi_lock_acquire(); esp_crypto_mpi_lock_acquire();
#endif /* SOC_ECDSA_USES_MPI */
} }
void esp_crypto_ecdsa_lock_release(void) void esp_crypto_ecdsa_lock_release(void)
{ {
#ifdef SOC_ECDSA_USES_MPI
esp_crypto_mpi_lock_release(); esp_crypto_mpi_lock_release();
#endif /* SOC_ECDSA_USES_MPI */
esp_crypto_ecc_lock_release(); esp_crypto_ecc_lock_release();
_lock_release(&s_crypto_ecdsa_lock); _lock_release(&s_crypto_ecdsa_lock);
} }
#endif /* SOC_ECDSA_SUPPORTED */
#ifdef SOC_KEY_MANAGER_SUPPORTED
void esp_crypto_key_manager_lock_acquire(void) void esp_crypto_key_manager_lock_acquire(void)
{ {
_lock_acquire(&s_crypto_key_manager_lock); _lock_acquire(&s_crypto_key_manager_lock);
@@ -118,3 +161,4 @@ void esp_crypto_key_manager_lock_release(void)
{ {
_lock_release(&s_crypto_key_manager_lock); _lock_release(&s_crypto_key_manager_lock);
} }
#endif /* SOC_KEY_MANAGER_SUPPORTED */