ESP8684: Add esp8684 target to other repo for passing build

components/esp_http_client/lib/http_auth.c

@@ -39,7 +39,7 @@ static int md5_printf(char *md, const char *fmt, ...)
     unsigned char *buf;
     unsigned char digest[MD5_MAX_LEN];
     int len, i;
-    struct MD5Context md5_ctx;
+    md5_context_t md5_ctx;
     va_list ap;
     va_start(ap, fmt);
     len = vasprintf((char **)&buf, fmt, ap);

components/esp_phy/CMakeLists.txt

@@ -1,5 +1,10 @@
 idf_build_get_property(idf_target IDF_TARGET)
 
+if(IDF_TARGET STREQUAL "esp8684")
+    # TODO : IDF-3906
+    return()
+endif()
+
 if(CONFIG_ESP32_NO_BLOBS OR CONFIG_ESP32S2_NO_BLOBS)
     set(link_binary_libs 0)
     set(ldfragments)

components/esp_serial_slave_link/include/essl_spi/esp8684_defs.h

@@ -0,0 +1,30 @@
+/*
+ * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+
+#pragma once
+
+// NOTE: From the view of master
+#define CMD_HD_WRBUF_REG    0x01
+#define CMD_HD_RDBUF_REG    0x02
+#define CMD_HD_WRDMA_REG    0x03
+#define CMD_HD_RDDMA_REG    0x04
+
+#define CMD_HD_ONEBIT_MODE  0x00
+#define CMD_HD_DOUT_MODE    0x10
+#define CMD_HD_QOUT_MODE    0x20
+#define CMD_HD_DIO_MODE     0x50
+#define CMD_HD_QIO_MODE     0xA0
+
+#define CMD_HD_SEG_END_REG  0x05
+#define CMD_HD_EN_QPI_REG   0x06
+#define CMD_HD_WR_END_REG   0x07
+#define CMD_HD_INT0_REG     0x08
+#define CMD_HD_INT1_REG     0x09
+#define CMD_HD_INT2_REG     0x0A
+#define CMD_HD_EX_QPI_REG   0xDD
+
+#define SPI_SLAVE_HD_BUFFER_SIZE 64

components/esp_wifi/Kconfig

@@ -1,10 +1,11 @@
 
 menu "Wi-Fi"
-    visible if !IDF_TARGET_ESP32H2
+    visible if !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP8684 # TODO: remove 8684 after supported. IDF-3905
 
     config ESP32_WIFI_ENABLED
         bool
-        default "y" if !IDF_TARGET_ESP32H2 # TODO: replace with SOC_CAPS_SUPPORT_WIFI after IDF-2223 is done
+        default "n" if IDF_TARGET_ESP8684 # TODO: replace with SOC_CAPS_SUPPORT_WIFI after IDF-2223 is done
+        default "y" if !IDF_TARGET_ESP32H2
 
     config ESP32_WIFI_SW_COEXIST_ENABLE
         bool "Software controls WiFi/Bluetooth coexistence"

components/idf_test/include/esp8684/idf_performance_target.h

@@ -0,0 +1,105 @@
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            43
+
+// SHA256 hardware throughput at 160 MHz, threshold set lower than worst case
+#define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC                             90
+// esp_sha() time to process 32KB of input data from RAM
+#define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB                                      560
+
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP                               19000
+#define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP                              210000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP                               45000
+#define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP                              670000
+
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING                            32
+#define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA                     30
+
+/*
+ * Flash Performance value
+ * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
+ * These thresholds are set to about 70% of the average test data, under certain condition.
+ * Contact Espressif for details.
+ */
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
+// rom options is much slower. use its 70%
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               42200
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
+// legacy & suspend config are much faster. use the 70% of slower configs
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               (179*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (622*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6536*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
+//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               23700
+#endif
+
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      46400
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
+// legacy & suspend config are much faster. use the 70% of slower configs
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      (183*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (605*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6676*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
+//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      22900
+#endif
+
+// No SPI1 tests for C3
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 0
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 0
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                0
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                0
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
+//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 0
+#endif
+
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  43300
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
+// rom options is much slower. use its 70%
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  99500
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (300*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (754*1000)
+#endif
+#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
+//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
+#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  33900
+#endif
+
+// floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV                                      70
+#define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT                                     140

components/log/include/esp_log.h

@@ -21,6 +21,8 @@
 #include "esp32c3/rom/ets_sys.h"
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/ets_sys.h"
+#elif CONFIG_IDF_TARGET_ESP8684
+#include "esp8684/rom/ets_sys.h"
 #endif
 
 #ifdef __cplusplus

components/lwip/port/esp32/hooks/tcp_isn_default.c

@@ -170,11 +170,12 @@ lwip_hook_tcp_isn(const ip_addr_t *local_ip, u16_t local_port,
   assert(!esp_ptr_external_ram(esp_cpu_get_sp()));
 #endif
 
-  struct MD5Context ctx;
+  md5_context_t ctx;
   esp_rom_md5_init(&ctx);
   esp_rom_md5_update(&ctx, input, sizeof(input));
   esp_rom_md5_final(output, &ctx);
 
+
   /* Arbitrarily take the first 32 bits from the generated hash. */
   MEMCPY(&isn, output, sizeof(isn));
 

components/perfmon/CMakeLists.txt

@@ -1,5 +1,5 @@
 idf_build_get_property(target IDF_TARGET)
-if(${target} STREQUAL "esp32c3" OR ${target} STREQUAL "esp32h2")
+if(${target} STREQUAL "esp32c3" OR ${target} STREQUAL "esp32h2" OR ${target} STREQUAL "esp8684")
         return()
 endif()
 

components/spiffs/esp_spiffs.c

@@ -1,16 +1,8 @@
-// Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 
 #include "esp_spiffs.h"
 #include "spiffs.h"
@@ -39,6 +31,8 @@
 #include "esp32c3/rom/spi_flash.h"
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/rom/spi_flash.h"
+#elif CONFIG_IDF_TARGET_ESP8684
+#include "esp8684/rom/spi_flash.h"
 #endif
 
 #include "spiffs_api.h"

components/ulp/CMakeLists.txt

@@ -1,6 +1,6 @@
 idf_build_get_property(target IDF_TARGET)
 
-if(NOT (IDF_TARGET STREQUAL "esp32c3") AND NOT (IDF_TARGET STREQUAL "esp32h2"))
+if(NOT (IDF_TARGET STREQUAL "esp32c3") AND NOT (IDF_TARGET STREQUAL "esp32h2") AND NOT (IDF_TARGET STREQUAL "esp8684"))
     set(srcs "ulp.c"
              "ulp_macro.c")
 

components/unity/unity_port_esp32.c

@@ -1,16 +1,8 @@
-// Copyright 2016-2018 Espressif Systems (Shanghai) PTE LTD
+/*
-//
+ * SPDX-FileCopyrightText: 2016-2021 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 #include <string.h>
 #include "unity.h"
 #include "sdkconfig.h"
@@ -27,6 +19,8 @@
 #include "esp32c3/clk.h"
 #elif CONFIG_IDF_TARGET_ESP32H2
 #include "esp32h2/clk.h"
+#elif CONFIG_IDF_TARGET_ESP8684
+#include "esp_private/esp_clk.h"
 #endif
 
 static uint32_t s_test_start, s_test_stop;

components/vfs/vfs_semihost.c

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) Co. Ltd.
+/*
-//
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
-// Licensed under the Apache License, Version 2.0 (the "License");
+ *
-// you may not use this file except in compliance with the License.
+ * SPDX-License-Identifier: Apache-2.0
-// You may obtain a copy of the License at
+ */
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
 
 #include "esp_vfs.h"
 #include "freertos/FreeRTOS.h"
@@ -114,7 +106,7 @@ static vfs_semihost_ctx_t s_semhost_ctx[CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS];
 
 static inline int generic_syscall(int sys_nr, int arg1, int arg2, int arg3, int arg4, int* ret_errno)
 {
-#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 // TODO ESP32-C3 reenable semihost in C3 IDF-2287
+#if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP8684 // TODO ESP32-C3 reenable semihost in C3 IDF-2287
     int host_ret, host_errno;
 
     if (!esp_cpu_in_ocd_debug_mode()) {

components/xtensa/CMakeLists.txt

@@ -1,7 +1,7 @@
 idf_build_get_property(target IDF_TARGET)
 
 # should test arch here not target: IDF-1754
-if("${target}" STREQUAL "esp32c3" OR "${target}" STREQUAL "esp32h2")
+if("${target}" STREQUAL "esp32c3" OR "${target}" STREQUAL "esp32h2" OR "${target}" STREQUAL "esp8684")
     return()
 endif()