From 5bcd9b2db8ea728883c61b2dac23739380855df6 Mon Sep 17 00:00:00 2001 From: Omar Chebib Date: Wed, 27 Apr 2022 11:37:08 +0800 Subject: [PATCH] G0: RISC-V targets have now an independent G0 layer G0 doesn't depend on any G1+ layer for RISC-V based targets --- .../esp32c2/private_include/regi2c_brownout.h | 15 +--- .../esp32c2/private_include/regi2c_saradc.h | 72 +---------------- .../esp32c3/private_include/regi2c_brownout.h | 15 +--- .../esp32c3/private_include/regi2c_saradc.h | 72 +---------------- .../esp32h2/private_include/regi2c_brownout.h | 15 +--- .../esp32h2/private_include/regi2c_saradc.h | 72 +---------------- components/hal/esp32c2/brownout_hal.c | 11 ++- components/hal/esp32c2/include/hal/adc_ll.h | 10 ++- components/hal/esp32c2/include/hal/gdma_ll.h | 1 + components/hal/esp32c3/brownout_hal.c | 10 ++- components/hal/esp32c3/include/hal/adc_ll.h | 10 ++- components/hal/esp32c3/include/hal/gdma_ll.h | 1 + components/hal/esp32h2/brownout_hal.c | 11 ++- components/hal/esp32h2/include/hal/adc_ll.h | 10 ++- components/hal/esp32h2/include/hal/gdma_ll.h | 1 + components/hal/include/hal/rtc_io_hal.h | 2 + components/hal/spi_flash_hal.c | 2 +- components/riscv/CMakeLists.txt | 2 +- .../soc/esp32c2/include/soc/regi2c_brownout.h | 22 ++++++ .../soc/esp32c2/include/soc/regi2c_saradc.h | 79 +++++++++++++++++++ .../soc/esp32c3/include/soc/regi2c_brownout.h | 22 ++++++ .../soc/esp32c3/include/soc/regi2c_saradc.h | 79 +++++++++++++++++++ .../soc/esp32h2/include/soc/regi2c_brownout.h | 22 ++++++ .../soc/esp32h2/include/soc/regi2c_saradc.h | 79 +++++++++++++++++++ 24 files changed, 366 insertions(+), 269 deletions(-) create mode 100644 components/soc/esp32c2/include/soc/regi2c_brownout.h create mode 100644 components/soc/esp32c2/include/soc/regi2c_saradc.h create mode 100644 components/soc/esp32c3/include/soc/regi2c_brownout.h create mode 100644 components/soc/esp32c3/include/soc/regi2c_saradc.h create mode 100644 components/soc/esp32h2/include/soc/regi2c_brownout.h create mode 100644 components/soc/esp32h2/include/soc/regi2c_saradc.h diff --git a/components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h b/components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h index 76c943b204..0d42d89282 100644 --- a/components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h +++ b/components/esp_hw_support/port/esp32c2/private_include/regi2c_brownout.h @@ -6,17 +6,4 @@ #pragma once -/** - * @file regi2c_brownout.h - * @brief Register definitions for brownout detector - * - * This file lists register fields of the brownout detector, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h. - */ - -#define I2C_BOD 0x61 -#define I2C_BOD_HOSTID 0 - -#define I2C_BOD_THRESHOLD 0x5 -#define I2C_BOD_THRESHOLD_MSB 2 -#define I2C_BOD_THRESHOLD_LSB 0 +#include "soc/regi2c_brownout.h" diff --git a/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h index dd23556527..e99e7faa54 100644 --- a/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h @@ -6,74 +6,4 @@ #pragma once -/** - * @file regi2c_saradc.h - * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. - * - * This file lists register fields of SAR, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h, by - * function in adc_ll.h. - */ - -#define I2C_SAR_ADC 0X69 -#define I2C_SAR_ADC_HOSTID 0 - -#define ADC_SAR1_ENCAL_GND_ADDR 0x7 -#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 -#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 - -#define ADC_SAR2_ENCAL_GND_ADDR 0x7 -#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 -#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 - -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR1_DREF_ADDR 0x2 -#define ADC_SAR1_DREF_ADDR_MSB 0x6 -#define ADC_SAR1_DREF_ADDR_LSB 0x4 - -#define ADC_SAR2_DREF_ADDR 0x5 -#define ADC_SAR2_DREF_ADDR_MSB 0x6 -#define ADC_SAR2_DREF_ADDR_LSB 0x4 - -#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 - -#define ADC_SARADC_DTEST_RTC_ADDR 0x7 -#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 -#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 - -#define ADC_SARADC_ENT_TSENS_ADDR 0x7 -#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 -#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 - -#define ADC_SARADC_ENT_RTC_ADDR 0x7 -#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 -#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 - -#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 -#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 - -#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 -#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 - -#define I2C_SARADC_TSENS_DAC 0x6 -#define I2C_SARADC_TSENS_DAC_MSB 3 -#define I2C_SARADC_TSENS_DAC_LSB 0 +#include "soc/regi2c_saradc.h" diff --git a/components/esp_hw_support/port/esp32c3/private_include/regi2c_brownout.h b/components/esp_hw_support/port/esp32c3/private_include/regi2c_brownout.h index 1aa54a2017..733d0daa9f 100644 --- a/components/esp_hw_support/port/esp32c3/private_include/regi2c_brownout.h +++ b/components/esp_hw_support/port/esp32c3/private_include/regi2c_brownout.h @@ -6,17 +6,4 @@ #pragma once -/** - * @file regi2c_brownout.h - * @brief Register definitions for brownout detector - * - * This file lists register fields of the brownout detector, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h. - */ - -#define I2C_BOD 0x61 -#define I2C_BOD_HOSTID 0 - -#define I2C_BOD_THRESHOLD 0x5 -#define I2C_BOD_THRESHOLD_MSB 2 -#define I2C_BOD_THRESHOLD_LSB 0 +#include "soc/regi2c_brownout.h" diff --git a/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h index dd23556527..e99e7faa54 100644 --- a/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h @@ -6,74 +6,4 @@ #pragma once -/** - * @file regi2c_saradc.h - * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. - * - * This file lists register fields of SAR, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h, by - * function in adc_ll.h. - */ - -#define I2C_SAR_ADC 0X69 -#define I2C_SAR_ADC_HOSTID 0 - -#define ADC_SAR1_ENCAL_GND_ADDR 0x7 -#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 -#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 - -#define ADC_SAR2_ENCAL_GND_ADDR 0x7 -#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 -#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 - -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR1_DREF_ADDR 0x2 -#define ADC_SAR1_DREF_ADDR_MSB 0x6 -#define ADC_SAR1_DREF_ADDR_LSB 0x4 - -#define ADC_SAR2_DREF_ADDR 0x5 -#define ADC_SAR2_DREF_ADDR_MSB 0x6 -#define ADC_SAR2_DREF_ADDR_LSB 0x4 - -#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 - -#define ADC_SARADC_DTEST_RTC_ADDR 0x7 -#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 -#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 - -#define ADC_SARADC_ENT_TSENS_ADDR 0x7 -#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 -#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 - -#define ADC_SARADC_ENT_RTC_ADDR 0x7 -#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 -#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 - -#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 -#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 - -#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 -#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 - -#define I2C_SARADC_TSENS_DAC 0x6 -#define I2C_SARADC_TSENS_DAC_MSB 3 -#define I2C_SARADC_TSENS_DAC_LSB 0 +#include "soc/regi2c_saradc.h" diff --git a/components/esp_hw_support/port/esp32h2/private_include/regi2c_brownout.h b/components/esp_hw_support/port/esp32h2/private_include/regi2c_brownout.h index 1aa54a2017..733d0daa9f 100644 --- a/components/esp_hw_support/port/esp32h2/private_include/regi2c_brownout.h +++ b/components/esp_hw_support/port/esp32h2/private_include/regi2c_brownout.h @@ -6,17 +6,4 @@ #pragma once -/** - * @file regi2c_brownout.h - * @brief Register definitions for brownout detector - * - * This file lists register fields of the brownout detector, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h. - */ - -#define I2C_BOD 0x61 -#define I2C_BOD_HOSTID 0 - -#define I2C_BOD_THRESHOLD 0x5 -#define I2C_BOD_THRESHOLD_MSB 2 -#define I2C_BOD_THRESHOLD_LSB 0 +#include "soc/regi2c_brownout.h" diff --git a/components/esp_hw_support/port/esp32h2/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32h2/private_include/regi2c_saradc.h index 1c35fd61ef..27561e9897 100644 --- a/components/esp_hw_support/port/esp32h2/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32h2/private_include/regi2c_saradc.h @@ -6,74 +6,4 @@ #pragma once -/** - * @file regi2c_saradc.h - * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. - * - * This file lists register fields of SAR, located on an internal configuration - * bus. These definitions are used via macros defined in regi2c_ctrl.h, by - * function in adc_ll.h. - */ - -#define I2C_SAR_ADC 0X69 -#define I2C_SAR_ADC_HOSTID 0 - -#define ADC_SAR1_ENCAL_GND_ADDR 0x7 -#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 -#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 - -#define ADC_SAR2_ENCAL_GND_ADDR 0x7 -#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 -#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 - -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 -#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 - -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 -#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 - -#define ADC_SAR1_DREF_ADDR 0x2 -#define ADC_SAR1_DREF_ADDR_MSB 0x6 -#define ADC_SAR1_DREF_ADDR_LSB 0x4 - -#define ADC_SAR2_DREF_ADDR 0x5 -#define ADC_SAR2_DREF_ADDR_MSB 0x6 -#define ADC_SAR2_DREF_ADDR_LSB 0x4 - -#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 -#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 - -#define ADC_SARADC_DTEST_RTC_ADDR 0x7 -#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 -#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 - -#define ADC_SARADC_ENT_TSENS_ADDR 0x7 -#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 -#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 - -#define ADC_SARADC_ENT_RTC_ADDR 0x7 -#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 -#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 - -#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 -#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 - -#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 -#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 -#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 - -#define I2C_SARADC_TSENS_DAC 0x6 -#define I2C_SARADC_TSENS_DAC_MSB 3 -#define I2C_SARADC_TSENS_DAC_LSB 0 +#include "soc/regi2c_saradc.h" diff --git a/components/hal/esp32c2/brownout_hal.c b/components/hal/esp32c2/brownout_hal.c index ee0c7377e6..9d8d3aea8f 100644 --- a/components/hal/esp32c2/brownout_hal.c +++ b/components/hal/esp32c2/brownout_hal.c @@ -8,9 +8,16 @@ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_brownout.h" #include "esp_attr.h" +#include "esp_rom_regi2c.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + /* Only write funciton is needed in HAL component */ + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif + +#include "soc/regi2c_brownout.h" void brownout_hal_config(const brownout_hal_config_t *cfg) diff --git a/components/hal/esp32c2/include/hal/adc_ll.h b/components/hal/esp32c2/include/hal/adc_ll.h index 3fcef891ed..5237a71da8 100644 --- a/components/hal/esp32c2/include/hal/adc_ll.h +++ b/components/hal/esp32c2/include/hal/adc_ll.h @@ -17,9 +17,15 @@ #include "hal/misc.h" #include "hal/adc_types.h" #include "hal/adc_types_private.h" +#include "esp_rom_regi2c.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_saradc.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif + +#include "soc/regi2c_saradc.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32c2/include/hal/gdma_ll.h b/components/hal/esp32c2/include/hal/gdma_ll.h index b94da07b68..3db45a5f44 100644 --- a/components/hal/esp32c2/include/hal/gdma_ll.h +++ b/components/hal/esp32c2/include/hal/gdma_ll.h @@ -5,6 +5,7 @@ */ #pragma once +#include /* Required for NULL constant */ #include #include #include "soc/gdma_struct.h" diff --git a/components/hal/esp32c3/brownout_hal.c b/components/hal/esp32c3/brownout_hal.c index ee0c7377e6..8a514c4f03 100644 --- a/components/hal/esp32c3/brownout_hal.c +++ b/components/hal/esp32c3/brownout_hal.c @@ -8,10 +8,16 @@ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_brownout.h" #include "esp_attr.h" +#include "esp_rom_regi2c.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + /* Only write funciton is needed in HAL component */ + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif +#include "soc/regi2c_brownout.h" void brownout_hal_config(const brownout_hal_config_t *cfg) { diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/hal/esp32c3/include/hal/adc_ll.h index 81c190b447..81ab475307 100644 --- a/components/hal/esp32c3/include/hal/adc_ll.h +++ b/components/hal/esp32c3/include/hal/adc_ll.h @@ -18,9 +18,15 @@ #include "hal/assert.h" #include "hal/adc_types.h" #include "hal/adc_types_private.h" +#include "esp_rom_regi2c.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_saradc.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif + +#include "soc/regi2c_saradc.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32c3/include/hal/gdma_ll.h b/components/hal/esp32c3/include/hal/gdma_ll.h index fb7a8713be..67aa058e42 100644 --- a/components/hal/esp32c3/include/hal/gdma_ll.h +++ b/components/hal/esp32c3/include/hal/gdma_ll.h @@ -5,6 +5,7 @@ */ #pragma once +#include /* Required for NULL constant */ #include #include #include "soc/gdma_struct.h" diff --git a/components/hal/esp32h2/brownout_hal.c b/components/hal/esp32h2/brownout_hal.c index aff79650c0..db482d365e 100644 --- a/components/hal/esp32h2/brownout_hal.c +++ b/components/hal/esp32h2/brownout_hal.c @@ -9,9 +9,16 @@ #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" #include "i2c_pmu.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_brownout.h" #include "esp_attr.h" +#include "esp_rom_regi2c.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + /* Only write funciton is needed in HAL component */ + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif + +#include "soc/regi2c_brownout.h" void brownout_hal_config(const brownout_hal_config_t *cfg) diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index 92ffa39052..8eb432b94c 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -17,9 +17,15 @@ #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" #include "hal/misc.h" +#include "esp_rom_regi2c.h" -#include "esp_private/regi2c_ctrl.h" -#include "regi2c_saradc.h" +#if __has_include("esp_private/regi2c_ctrl.h") + #include "esp_private/regi2c_ctrl.h" +#else + #define REGI2C_WRITE_MASK(block, reg_add, indata) esp_rom_regi2c_write_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) +#endif + +#include "soc/regi2c_saradc.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32h2/include/hal/gdma_ll.h b/components/hal/esp32h2/include/hal/gdma_ll.h index fb7a8713be..67aa058e42 100644 --- a/components/hal/esp32h2/include/hal/gdma_ll.h +++ b/components/hal/esp32h2/include/hal/gdma_ll.h @@ -5,6 +5,7 @@ */ #pragma once +#include /* Required for NULL constant */ #include #include #include "soc/gdma_struct.h" diff --git a/components/hal/include/hal/rtc_io_hal.h b/components/hal/include/hal/rtc_io_hal.h index 75ebb38b9c..d3d9684a05 100644 --- a/components/hal/include/hal/rtc_io_hal.h +++ b/components/hal/include/hal/rtc_io_hal.h @@ -15,6 +15,8 @@ #pragma once #include +#include "sdkconfig.h" + #if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2 #include "soc/soc_caps.h" #include "hal/rtc_io_ll.h" diff --git a/components/hal/spi_flash_hal.c b/components/hal/spi_flash_hal.c index 2fe7909540..6e4db3c887 100644 --- a/components/hal/spi_flash_hal.c +++ b/components/hal/spi_flash_hal.c @@ -30,7 +30,7 @@ static uint32_t get_flash_clock_divider(const spi_flash_hal_config_t *cfg) // round down flash frequency to keep it safe. int best_div = 0; if (clk_source < cfg->freq_mhz) { - ESP_LOGE(TAG, "Target frequency %dMHz higher than supported.", cfg->freq_mhz); + HAL_LOGE(TAG, "Target frequency %dMHz higher than supported.", cfg->freq_mhz); abort(); } #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 diff --git a/components/riscv/CMakeLists.txt b/components/riscv/CMakeLists.txt index e8a37ed461..03be33db52 100644 --- a/components/riscv/CMakeLists.txt +++ b/components/riscv/CMakeLists.txt @@ -9,7 +9,7 @@ endif() if(BOOTLOADER_BUILD) set(priv_requires soc) else() - set(priv_requires soc freertos) + set(priv_requires soc) set(srcs "instruction_decode.c" "interrupt.c" diff --git a/components/soc/esp32c2/include/soc/regi2c_brownout.h b/components/soc/esp32c2/include/soc/regi2c_brownout.h new file mode 100644 index 0000000000..76c943b204 --- /dev/null +++ b/components/soc/esp32c2/include/soc/regi2c_brownout.h @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_brownout.h + * @brief Register definitions for brownout detector + * + * This file lists register fields of the brownout detector, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h. + */ + +#define I2C_BOD 0x61 +#define I2C_BOD_HOSTID 0 + +#define I2C_BOD_THRESHOLD 0x5 +#define I2C_BOD_THRESHOLD_MSB 2 +#define I2C_BOD_THRESHOLD_LSB 0 diff --git a/components/soc/esp32c2/include/soc/regi2c_saradc.h b/components/soc/esp32c2/include/soc/regi2c_saradc.h new file mode 100644 index 0000000000..dd23556527 --- /dev/null +++ b/components/soc/esp32c2/include/soc/regi2c_saradc.h @@ -0,0 +1,79 @@ +/* + * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_saradc.h + * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. + * + * This file lists register fields of SAR, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h, by + * function in adc_ll.h. + */ + +#define I2C_SAR_ADC 0X69 +#define I2C_SAR_ADC_HOSTID 0 + +#define ADC_SAR1_ENCAL_GND_ADDR 0x7 +#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 +#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 + +#define ADC_SAR2_ENCAL_GND_ADDR 0x7 +#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 +#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 + +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR1_DREF_ADDR 0x2 +#define ADC_SAR1_DREF_ADDR_MSB 0x6 +#define ADC_SAR1_DREF_ADDR_LSB 0x4 + +#define ADC_SAR2_DREF_ADDR 0x5 +#define ADC_SAR2_DREF_ADDR_MSB 0x6 +#define ADC_SAR2_DREF_ADDR_LSB 0x4 + +#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 + +#define ADC_SARADC_DTEST_RTC_ADDR 0x7 +#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 +#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 + +#define ADC_SARADC_ENT_TSENS_ADDR 0x7 +#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 +#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 + +#define ADC_SARADC_ENT_RTC_ADDR 0x7 +#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 +#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 + +#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 +#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 + +#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 +#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 + +#define I2C_SARADC_TSENS_DAC 0x6 +#define I2C_SARADC_TSENS_DAC_MSB 3 +#define I2C_SARADC_TSENS_DAC_LSB 0 diff --git a/components/soc/esp32c3/include/soc/regi2c_brownout.h b/components/soc/esp32c3/include/soc/regi2c_brownout.h new file mode 100644 index 0000000000..1aa54a2017 --- /dev/null +++ b/components/soc/esp32c3/include/soc/regi2c_brownout.h @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_brownout.h + * @brief Register definitions for brownout detector + * + * This file lists register fields of the brownout detector, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h. + */ + +#define I2C_BOD 0x61 +#define I2C_BOD_HOSTID 0 + +#define I2C_BOD_THRESHOLD 0x5 +#define I2C_BOD_THRESHOLD_MSB 2 +#define I2C_BOD_THRESHOLD_LSB 0 diff --git a/components/soc/esp32c3/include/soc/regi2c_saradc.h b/components/soc/esp32c3/include/soc/regi2c_saradc.h new file mode 100644 index 0000000000..dd23556527 --- /dev/null +++ b/components/soc/esp32c3/include/soc/regi2c_saradc.h @@ -0,0 +1,79 @@ +/* + * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_saradc.h + * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. + * + * This file lists register fields of SAR, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h, by + * function in adc_ll.h. + */ + +#define I2C_SAR_ADC 0X69 +#define I2C_SAR_ADC_HOSTID 0 + +#define ADC_SAR1_ENCAL_GND_ADDR 0x7 +#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 +#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 + +#define ADC_SAR2_ENCAL_GND_ADDR 0x7 +#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 +#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 + +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR1_DREF_ADDR 0x2 +#define ADC_SAR1_DREF_ADDR_MSB 0x6 +#define ADC_SAR1_DREF_ADDR_LSB 0x4 + +#define ADC_SAR2_DREF_ADDR 0x5 +#define ADC_SAR2_DREF_ADDR_MSB 0x6 +#define ADC_SAR2_DREF_ADDR_LSB 0x4 + +#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 + +#define ADC_SARADC_DTEST_RTC_ADDR 0x7 +#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 +#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 + +#define ADC_SARADC_ENT_TSENS_ADDR 0x7 +#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 +#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 + +#define ADC_SARADC_ENT_RTC_ADDR 0x7 +#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 +#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 + +#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 +#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 + +#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 +#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 + +#define I2C_SARADC_TSENS_DAC 0x6 +#define I2C_SARADC_TSENS_DAC_MSB 3 +#define I2C_SARADC_TSENS_DAC_LSB 0 diff --git a/components/soc/esp32h2/include/soc/regi2c_brownout.h b/components/soc/esp32h2/include/soc/regi2c_brownout.h new file mode 100644 index 0000000000..76c943b204 --- /dev/null +++ b/components/soc/esp32h2/include/soc/regi2c_brownout.h @@ -0,0 +1,22 @@ +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_brownout.h + * @brief Register definitions for brownout detector + * + * This file lists register fields of the brownout detector, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h. + */ + +#define I2C_BOD 0x61 +#define I2C_BOD_HOSTID 0 + +#define I2C_BOD_THRESHOLD 0x5 +#define I2C_BOD_THRESHOLD_MSB 2 +#define I2C_BOD_THRESHOLD_LSB 0 diff --git a/components/soc/esp32h2/include/soc/regi2c_saradc.h b/components/soc/esp32h2/include/soc/regi2c_saradc.h new file mode 100644 index 0000000000..1c35fd61ef --- /dev/null +++ b/components/soc/esp32h2/include/soc/regi2c_saradc.h @@ -0,0 +1,79 @@ +/* + * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_saradc.h + * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. + * + * This file lists register fields of SAR, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h, by + * function in adc_ll.h. + */ + +#define I2C_SAR_ADC 0X69 +#define I2C_SAR_ADC_HOSTID 0 + +#define ADC_SAR1_ENCAL_GND_ADDR 0x7 +#define ADC_SAR1_ENCAL_GND_ADDR_MSB 5 +#define ADC_SAR1_ENCAL_GND_ADDR_LSB 5 + +#define ADC_SAR2_ENCAL_GND_ADDR 0x7 +#define ADC_SAR2_ENCAL_GND_ADDR_MSB 7 +#define ADC_SAR2_ENCAL_GND_ADDR_LSB 7 + +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR 0x1 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR1_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR 0x0 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR1_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR1_DREF_ADDR 0x2 +#define ADC_SAR1_DREF_ADDR_MSB 0x6 +#define ADC_SAR1_DREF_ADDR_LSB 0x4 + +#define ADC_SAR2_DREF_ADDR 0x5 +#define ADC_SAR2_DREF_ADDR_MSB 0x6 +#define ADC_SAR2_DREF_ADDR_LSB 0x4 + +#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 + +#define ADC_SARADC_DTEST_RTC_ADDR 0x7 +#define ADC_SARADC_DTEST_RTC_ADDR_MSB 1 +#define ADC_SARADC_DTEST_RTC_ADDR_LSB 0 + +#define ADC_SARADC_ENT_TSENS_ADDR 0x7 +#define ADC_SARADC_ENT_TSENS_ADDR_MSB 2 +#define ADC_SARADC_ENT_TSENS_ADDR_LSB 2 + +#define ADC_SARADC_ENT_RTC_ADDR 0x7 +#define ADC_SARADC_ENT_RTC_ADDR_MSB 3 +#define ADC_SARADC_ENT_RTC_ADDR_LSB 3 + +#define ADC_SARADC1_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC1_ENCAL_REF_ADDR_MSB 4 +#define ADC_SARADC1_ENCAL_REF_ADDR_LSB 4 + +#define ADC_SARADC2_ENCAL_REF_ADDR 0x7 +#define ADC_SARADC2_ENCAL_REF_ADDR_MSB 6 +#define ADC_SARADC2_ENCAL_REF_ADDR_LSB 6 + +#define I2C_SARADC_TSENS_DAC 0x6 +#define I2C_SARADC_TSENS_DAC_MSB 3 +#define I2C_SARADC_TSENS_DAC_LSB 0